Presentation of an efficient design methodology for FPGA implementation of control systems. Application to the design of an antiwindup PI controller
This paper presents an efficient design methodology to develop IP-core functions in VHDL for control systems. This methodology is able to cope with different optimization constraints such as the reduction of both the development time and the execution time and the minimization of the consumed resour...
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| Published in: | 2002 28th Annual Conference of the IEEE Industrial Electronics Society Vol. 3; pp. 1942 - 1947 vol.3 |
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| Main Authors: | , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
2002
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| Subjects: | |
| ISBN: | 0780374746, 9780780374744 |
| Online Access: | Get full text |
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| Summary: | This paper presents an efficient design methodology to develop IP-core functions in VHDL for control systems. This methodology is able to cope with different optimization constraints such as the reduction of both the development time and the execution time and the minimization of the consumed resources of the chip. Our approach uses the AAA methodology (algorithm architecture adequation), which allows to rapidly develop and optimize the implantation of the DFG (data flow graph) of an algorithm. In order to illustrate the efficiency of this methodology, the authors present the implantation of an antiwindup PI controller on a single field programmable gate array (FPGA) applied to the control of a DC/DC converter. |
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| ISBN: | 0780374746 9780780374744 |
| DOI: | 10.1109/IECON.2002.1185269 |

