A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique
A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invari...
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| Vydané v: | 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) s. 363 - 366 |
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| Hlavní autori: | , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English Japanese |
| Vydavateľské údaje: |
IEEE
01.12.2014
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