A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique

A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invari...

Full description

Bibliographic Details

Published in:	2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) pp. 363 - 366
Main Authors:	Hongbo Zhu, Asada, Kunihiro
Format:	Conference Proceeding
Language:	English Japanese
Published:	IEEE 01.12.2014
Subjects:	Computer architecture Feature extraction Image coding Image resolution Kernel Parallel processing Random access memory
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!