A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique
A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invari...
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| Published in: | 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) pp. 363 - 366 |
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| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English Japanese |
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IEEE
01.12.2014
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| Abstract | A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invariant feature transform (SIFT) algorithm. A 108 × 96-pixel sensor was designed using a 0.18 μm CMOS process in a 5 mm×5 mm chip. By simulating the sensor at 100 MHz, the image filtering times for 5×5, 7×7, and 9×9 Gaussian kernels in the SIFT algorithm are 34 μs, 49 μs, and 83 μs, respectively. Such a high processing speed is very important for achieving the real-time performance when filtering high resolution images with large kernels. |
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| AbstractList | A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invariant feature transform (SIFT) algorithm. A 108 × 96-pixel sensor was designed using a 0.18 μm CMOS process in a 5 mm×5 mm chip. By simulating the sensor at 100 MHz, the image filtering times for 5×5, 7×7, and 9×9 Gaussian kernels in the SIFT algorithm are 34 μs, 49 μs, and 83 μs, respectively. Such a high processing speed is very important for achieving the real-time performance when filtering high resolution images with large kernels. |
| Author | Asada, Kunihiro Hongbo Zhu |
| Author_xml | – sequence: 1 surname: Hongbo Zhu fullname: Hongbo Zhu email: zhu@vdec.u-tokyo.ac.jp organization: VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo, Japan – sequence: 2 givenname: Kunihiro surname: Asada fullname: Asada, Kunihiro email: asada@silicon.u-tokyo.ac.jp organization: VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo, Japan |
| BookMark | eNotj8tKAzEYhSPowlZfQDd5gRmTzCVkWYaqhUIX6rrk8mf8IZOJmRmxb2_Frg6c83HgW5HrOEYg5IGzknOmnnbdtnsrBeN1KVmtlJJXZMVrqVQtasFvCWzotCTISWcdAgSKg-6BegwzZIw9ddjjrEOR8AdCMUGcxkxhSGE8_c2a2nFIGaYJv4EOS5gxBbR6xjHSGexnxK8F7siN12GC-0uuycfz9r17LfaHl1232RfIm3YujADllRHGWQZWVsy12khjVCXaqqnPPZPQMGYa5zj3xnPrz5x2jZWNdaJak8f_XwSAY8pnmXw6XsyrXw-yVwE |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1109/ICECS.2014.7049997 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Xplore IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| EISBN | 1479942421 9781479942428 |
| EndPage | 366 |
| ExternalDocumentID | 7049997 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IL CBEJK RIE RIL |
| ID | FETCH-LOGICAL-i156t-b2e9f9b2bdc0ec730d6ab7bb93263542bd07e500b5dd11fbf1cfec7ad5c75cd23 |
| IEDL.DBID | RIE |
| IngestDate | Thu Jun 29 18:37:55 EDT 2023 |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English Japanese |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i156t-b2e9f9b2bdc0ec730d6ab7bb93263542bd07e500b5dd11fbf1cfec7ad5c75cd23 |
| PageCount | 4 |
| ParticipantIDs | ieee_primary_7049997 |
| PublicationCentury | 2000 |
| PublicationDate | 2014-12-01 |
| PublicationDateYYYYMMDD | 2014-12-01 |
| PublicationDate_xml | – month: 12 year: 2014 text: 2014-12-01 day: 01 |
| PublicationDecade | 2010 |
| PublicationTitle | 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) |
| PublicationTitleAbbrev | ICECS |
| PublicationYear | 2014 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| Score | 1.5612893 |
| Snippet | A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 363 |
| SubjectTerms | Computer architecture Feature extraction Image coding Image resolution Kernel Parallel processing Random access memory |
| Title | A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique |
| URI | https://ieeexplore.ieee.org/document/7049997 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1JS0MxEA5t8eBJpRV3cvBo2vfSLM1RSouClIILvZUsE3lQ2_K64M83SZ8VwYu3MBkSyJBkJvlmPoRuWc9RLZQglAYzMMYUUVpbEqKwXIGmMk88ZG9PcjTqTSZqXEN3-1wYAEjgM2jHZvrLdwu7iU9lHZn8c1lHdSnFLlfrOw8mU53H_qD_HMFarF0p_mJMSRfG8Oh_Ux2j1k_mHR7v75QTVIN5E8E9Xm2WUMYy3SHMn-HiI5wC2BfxpzuoYVe8R-4Psiw-YUZWITJdlBgSl2_s1jgCxxPgdQu4ghBWb3V4X8S1hV6Hg5f-A6noEUgRgq41MRSUV4YaZzOwYac6oY00JnpkXc6CPJPAs8xw5_LcG59bH_S041Zy62j3FDXmizmcIUxzz8GC4F5QJsIQjHMZ_O5MR5dCwTlqxiWaLncVMKbV6lz8Lb5Eh9EKO9DHFWqsyw1cowO7XRer8iaZ7QvDa55i |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEA61CnpSacW3OXg07W6abJqjlJYWaylYpbeSx6ws1LZsH_jzTdK1InjxFiZDAhmSzCTfzIfQPWtaqhKZEEqdGRhjkkilDHFRWCxBUREHHrK3vhgMmuOxHJbQwy4XBgAC-Axqvhn-8u3crP1TWV0E_1zsoX3OGI222VrfmTCRrPda7daLh2uxWqH6izMlXBmd4_9NdoKqP7l3eLi7VU5RCWYVBI94uV5A7gt1u0B_irMPdw7gNPN_3U4N2-zds3-QRfYJU7J0sek8xxDYfH23wh46HiCvG8AFiLB4rcO7Mq5V9Nppj1pdUhAkkMyFXSuiKchUaqqticC4vWoTpYXW3idrcObkkQAeRZpbG8epTmOTOj1luRHcWNo4Q-XZfAbnCNM45WAg4WlCWeKGYJwL53lHyjsVEi5QxS_RZLGtgTEpVufyb_EdOuyOnvuTfm_wdIWOvEW2EJBrVF7la7hBB2azypb5bTDhFyi1oak |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2014+21st+IEEE+International+Conference+on+Electronics%2C+Circuits+and+Systems+%28ICECS%29&rft.atitle=A+superparallel+image+filtering+digital-pixel-sensor+employing+a+compressive+multiplication+technique&rft.au=Hongbo+Zhu&rft.au=Asada%2C+Kunihiro&rft.date=2014-12-01&rft.pub=IEEE&rft.spage=363&rft.epage=366&rft_id=info:doi/10.1109%2FICECS.2014.7049997&rft.externalDocID=7049997 |