A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique

A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invari...

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Vydáno v:2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) s. 363 - 366
Hlavní autoři: Hongbo Zhu, Asada, Kunihiro
Médium: Konferenční příspěvek
Jazyk:angličtina
japonština
Vydáno: IEEE 01.12.2014
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Abstract A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invariant feature transform (SIFT) algorithm. A 108 × 96-pixel sensor was designed using a 0.18 μm CMOS process in a 5 mm×5 mm chip. By simulating the sensor at 100 MHz, the image filtering times for 5×5, 7×7, and 9×9 Gaussian kernels in the SIFT algorithm are 34 μs, 49 μs, and 83 μs, respectively. Such a high processing speed is very important for achieving the real-time performance when filtering high resolution images with large kernels.
AbstractList A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to accelerate the processing speed. As a result, speed-ups from 3.2 to 5.2 were achieved for Gaussian kernels ranged from 5×5 to 15×15 in scale-invariant feature transform (SIFT) algorithm. A 108 × 96-pixel sensor was designed using a 0.18 μm CMOS process in a 5 mm×5 mm chip. By simulating the sensor at 100 MHz, the image filtering times for 5×5, 7×7, and 9×9 Gaussian kernels in the SIFT algorithm are 34 μs, 49 μs, and 83 μs, respectively. Such a high processing speed is very important for achieving the real-time performance when filtering high resolution images with large kernels.
Author Asada, Kunihiro
Hongbo Zhu
Author_xml – sequence: 1
  surname: Hongbo Zhu
  fullname: Hongbo Zhu
  email: zhu@vdec.u-tokyo.ac.jp
  organization: VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo, Japan
– sequence: 2
  givenname: Kunihiro
  surname: Asada
  fullname: Asada, Kunihiro
  email: asada@silicon.u-tokyo.ac.jp
  organization: VLSI Design & Educ. Center (VDEC), Univ. of Tokyo, Tokyo, Japan
BookMark eNotj8tKAzEYhSPowlZfQDd5gRmTzCVkWYaqhUIX6rrk8mf8IZOJmRmxb2_Frg6c83HgW5HrOEYg5IGzknOmnnbdtnsrBeN1KVmtlJJXZMVrqVQtasFvCWzotCTISWcdAgSKg-6BegwzZIw9ddjjrEOR8AdCMUGcxkxhSGE8_c2a2nFIGaYJv4EOS5gxBbR6xjHSGexnxK8F7siN12GC-0uuycfz9r17LfaHl1232RfIm3YujADllRHGWQZWVsy12khjVCXaqqnPPZPQMGYa5zj3xnPrz5x2jZWNdaJak8f_XwSAY8pnmXw6XsyrXw-yVwE
ContentType Conference Proceeding
DBID 6IE
6IL
CBEJK
RIE
RIL
DOI 10.1109/ICECS.2014.7049997
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP All) 1998-Present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
EISBN 1479942421
9781479942428
EndPage 366
ExternalDocumentID 7049997
Genre orig-research
GroupedDBID 6IE
6IL
CBEJK
RIE
RIL
ID FETCH-LOGICAL-i156t-b2e9f9b2bdc0ec730d6ab7bb93263542bd07e500b5dd11fbf1cfec7ad5c75cd23
IEDL.DBID RIE
IngestDate Thu Jun 29 18:37:55 EDT 2023
IsPeerReviewed false
IsScholarly false
Language English
Japanese
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i156t-b2e9f9b2bdc0ec730d6ab7bb93263542bd07e500b5dd11fbf1cfec7ad5c75cd23
PageCount 4
ParticipantIDs ieee_primary_7049997
PublicationCentury 2000
PublicationDate 2014-12-01
PublicationDateYYYYMMDD 2014-12-01
PublicationDate_xml – month: 12
  year: 2014
  text: 2014-12-01
  day: 01
PublicationDecade 2010
PublicationTitle 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)
PublicationTitleAbbrev ICECS
PublicationYear 2014
Publisher IEEE
Publisher_xml – name: IEEE
Score 1.5613672
Snippet A full-pixel parallel image filtering architecture is developed based on the digital-pixel-sensor. A compressive multiplication technique is employed to...
SourceID ieee
SourceType Publisher
StartPage 363
SubjectTerms Computer architecture
Feature extraction
Image coding
Image resolution
Kernel
Parallel processing
Random access memory
Title A superparallel image filtering digital-pixel-sensor employing a compressive multiplication technique
URI https://ieeexplore.ieee.org/document/7049997
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEA5t8eBJpRXf5ODRtMlmk-wepbTopRRU6K3kMSsLtS3bbvHnm6RrRfDiLSQTAhmSmUm-mQ-he51QmTnLSGYkJylLJNEyYYT7qy-VweALF8km1GSSzWb5tIUeDrkwABDBZ9APzfiX71a2Dk9lAxX9c9VGbaXkPlfrOw-G5oPn4Wj4EsBaab8R_MWYEg3G-OR_S52i3k_mHZ4ebMoZasGyi-ARb-o1VKFMtw_zF7j88LcALsrw0-3FsCvfA_cHWZefsCAbH5muKgyRyzcMaxyA4xHwugPcQAibtzp8KOLaQ2_j0evwiTT0CKT0QdeWmATyIjeJcZaC9SfVSW2UMcEj4yL1_VSBoNQI5xgrTMFs4eW0E1YJ6xJ-jjrL1RIuEFYM_GQLBXMiVUC19xsl11pxZUSW8EvUDVs0X-8rYMyb3bn6u_saHQct7EEfN6izrWq4RUd2ty031V1U2xdyyZ6m
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEA61CnpSacW3OXg0bZLdbHaPUiot1lKwQm8lj1lZqG3pC3--SbpWBC_eQjIhkCGZmeSb-RC6V5wmqTWMpDqJSMx4QlTCGYnc1Rcn3uALG8gmZL-fjkbZoIIedrkwABDAZ9DwzfCXb2dm7Z_KmjL453IP7Ys45nSbrfWdCUOzZrfVbr16uFbcKEV_caYEk_F0_L_FTlD9J_cOD3ZW5RRVYFpD8IiX6zksfKFuF-hPcPHh7gGcF_6v24lhW7x79g8yLz5hQpYuNp0tMAQ2Xz-ssIeOB8jrBnAJIixf6_CujGsdvT21h60OKQkSSOHCrhXRHLI801xbQ8G4s2oTpaXW3ieLROz6qQRBqRbWMpbrnJncySkrjBTG8ugMVaezKZwjLBm4yQZyZkUsgSrnOSaRUjKSWqQ8ukA1v0Xj-bYGxrjcncu_u-_QYWf40hv3uv3nK3TkNbKFgFyj6mqxhht0YDarYrm4DSr8Atqsoe0
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2014+21st+IEEE+International+Conference+on+Electronics%2C+Circuits+and+Systems+%28ICECS%29&rft.atitle=A+superparallel+image+filtering+digital-pixel-sensor+employing+a+compressive+multiplication+technique&rft.au=Hongbo+Zhu&rft.au=Asada%2C+Kunihiro&rft.date=2014-12-01&rft.pub=IEEE&rft.spage=363&rft.epage=366&rft_id=info:doi/10.1109%2FICECS.2014.7049997&rft.externalDocID=7049997