Al-Hawaj, K., Afuye, O., Agwa, S., Apsel, A., & Batten, C. (2020, October). Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM. IEEE International Symposium on Circuits and Systems proceedings, 1-5. https://doi.org/10.1109/ISCAS45731.2020.9181068
Chicago-Zitierstil (17. Ausg.)Al-Hawaj, Khalid, Olalekan Afuye, Shady Agwa, Alyssa Apsel, und Christopher Batten. "Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator Using In-Situ Processing-In-SRAM." IEEE International Symposium on Circuits and Systems Proceedings Oct. 2020: 1-5. https://doi.org/10.1109/ISCAS45731.2020.9181068.
MLA-Zitierstil (9. Ausg.)Al-Hawaj, Khalid, et al. "Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator Using In-Situ Processing-In-SRAM." IEEE International Symposium on Circuits and Systems Proceedings, Oct. 2020, pp. 1-5, https://doi.org/10.1109/ISCAS45731.2020.9181068.