Parallel Algorithm Design and Optimization for Numerical Simulation Application of Ion Implantation in Silicon

We design a computational framework for ion implantation into silicon that can simulate the reaction process of cascade collisions in silicon and the subsequent annealing process. Since simulating materials requires large-scale particle data and high-precision simulation requirements, which often ta...

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Veröffentlicht in:Proceedings - International Conference on Parallel and Distributed Systems S. 1692 - 1700
Hauptverfasser: Qi, Ruixuan, Yang, Wangdong, Yan, Xiuwen, Li, Honglu, Zhang, Yifei, Li, Kenli
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 17.12.2023
Schlagworte:
Computers
data structure optimization
Data structures
Ion implantation
multi-level parallel strategy
Numerical simulation
Semiconductor device manufacture
Silicon
Simulated annealing
ISSN:2690-5965
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Zusammenfassung:We design a computational framework for ion implantation into silicon that can simulate the reaction process of cascade collisions in silicon and the subsequent annealing process. Since simulating materials requires large-scale particle data and high-precision simulation requirements, which often take up a lot of computing time, the conventional computing process needs to be accelerated in parallel to solve current problems. However, the current field of ion implantation focuses on the development of algorithms, often neglecting the design of parallel algorithms, and has not tested them on large-scale supercomputing clusters. Based on Tianhe new generation high-performance computers, this paper proposes a parallel computing framework for numerical simulation of ion implanted silicon based on multi-core processor architecture. By optimizing the data structure, the local continuity of the data is enhanced to improve the overall communication efficiency. Divide three-dimensional data for processes and adapt to MPI parallel computing strategies. Finally, a multi-level parallel computing strategy based on OpenMP is added to improve computing efficiency. After being deployed on the Tianhe new generation high-performance computer platform, experimental results show that on a single node, the multi-level parallel computing framework can increase the computing speed by 20.81X. After conducting tests at different scales, we can see that the parallel efficiency can be maintained at a high level.
ISSN:2690-5965
DOI:10.1109/ICPADS60453.2023.00236