Numeric-Digit Identifier based on Convolutional Neural Networks on Field-Programmable Gate Array

Convolutional Neural Networks (CNNs) are increasingly employed for voice recognition, image segmentation, and digit classification. Hardware support techniques are required as the need for processing power rises, and programmable hardware such as FPGAs are ideal for CNN workloads. The suggested appr...

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Vydáno v:2023 4th International Conference on Electronics and Sustainable Communication Systems (ICESC) s. 82 - 87
Hlavní autoři: VinothKumar, C, Kannan, N
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 06.07.2023
Témata:
Complexity theory
Convolution
Convolutional Neural Network (CNN)
Convolutional neural networks
Design methodology
Digit recognition
Field Programming Gate Array (FPGA)
Hardware
MNIST dataset
Reconfigurable logic
Speech recognition
Xilinx Zynq
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Shrnutí:Convolutional Neural Networks (CNNs) are increasingly employed for voice recognition, image segmentation, and digit classification. Hardware support techniques are required as the need for processing power rises, and programmable hardware such as FPGAs are ideal for CNN workloads. The suggested approach is to recognize the digit using the MNIST dataset and hardware realization of CNN acceleration to minimize processing time and complexity. The is identified with 2 hidden and 2 convolution layers, developed in Verilog HDL for Xilinx Zynq 7Z020 FPGA with considerations for size, power, and logical consumption.
DOI:10.1109/ICESC57686.2023.10193284