Fpga-In-Loop Simulation of an improved Converter Firing Control for LCC HVDC and Validation Using Real Time Digital Simulator(HIL)

This paper describes Converter Firing Control Module for Line commutated converter based High Voltage Direct Current converter which is the integral part of overall controls used by the HVDC control system. In this case initially Converter firing control model is designed in Simulink in order verify...

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Bibliographic Details
Published in:	2019 IEEE International Conference on Electrical, Computer and Communication Technologies (ICECCT) pp. 1 - 8
Main Authors:	Nasika, Dhanunjayudu, Yuvaraju, A., Reddy, Vishnuvardhan K., Jithin Sundar, S.V.N.
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.02.2019
Subjects:	and Line commutated Converter (LCC) Converter Firing Control (CFC) Field Programmable Gate Array (FPGA) Firing Hardware design languages High Voltage Direct Current Transmission (HVDC) HVDC transmission Low Pass Filter (LPF) Matlab HDL coder Commutation Voltage (Vcom) MATLAB HDL Verifier Phase Locked Loop (PLL) Phase locked loops Real Time digital simulator (RTDS) Real Time Operating Systems (RTOS) Synchronization Voltage (Vsync) FIL (FPGA In The Loop) HIL (Hardware In Loop) Valves Voltage control Voltage-controlled oscillators
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Summary:	This paper describes Converter Firing Control Module for Line commutated converter based High Voltage Direct Current converter which is the integral part of overall controls used by the HVDC control system. In this case initially Converter firing control model is designed in Simulink in order verify the logic first in Simulink. Verilog code has been obtained for the above verified module using MATLAB HDL coder tool box which will automate the Verilog/VHDL code generation for Very High Speed Integrated Circuit (VHSIC) Hardware. Then the VHDL design is verified using MATLAB HDL verifier toolbox and Xilinx-SP605 Development board proving the model through FPGA-in-the-Loop (FIL) co-simulation approach. The final verified Verilog module is then downloaded in to the target hardware to validate the logic through real time simulation in the form of Hardware-In-Loop. This new method of rapid prototyping based implementation of algorithms in verilog/VHDL will provide us an effective and fast method of FPGA based target hardware implementation to perform rapid prototyping and complex hardware simulations in real time compared with Manual HDL design. The final design ported in to the actual target controller hardware is tested using Real Time Digital Simulator on a +/- 500 kV 2500 Mw Bi-pole LCC based HVDC system developed on it. The studies performed with this firing control logic included in the target Hardware has met the firing angle accuracy of 0.02 degree which is very much less than the required accuracy of 0.1 degree and frequency accuracy of 0.02 Hz of the final controller hardware.
DOI:	10.1109/ICECCT.2019.8869048