A Comparative Analysis at Binary Arithmetic Coders on FPGA System

In FPGAs system, memory is one of the major limiting factor for processing large data. Meanwhile, FPGAs have bounded on-chip memory, therefore it requires efficient usage of resources in order handle system fault like as power constraints, size and on-demand performance. There are several techniques...

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Vydané v:	2020 International Conference on Industry 4.0 Technology (I4Tech) s. 136 - 140
Hlavní autori:	Sadhana, Choudhary, Raga, Sarika
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 01.02.2020
Predmet:	Adaptation models Adaptive binary range coder (ABRC) Channel coding Context modeling Context-adaptive binary arithmetic coding (CABAC) Fault Field programmable gate arrays FPGA Image coding Transform coding
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