A theta (log n) algorithm for modulo multiplication

A theta (log n) algorithm for large moduli multiplication for residue-number-system (RNS)-based architectures is proposed. The modulo multiplier is much faster than previously proposed multipliers, and more area efficient. The implementation of the multiplier is modular and is based on simple cells,...

Celý popis

Uloženo v:
Podrobná bibliografie
Vydáno v:Proceedings of the 32nd Midwest Symposium on Circuits and Systems s. 353 - 356 vol.1
Hlavní autoři: Elleithy, K.M., Bayoumi, M.A.
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 1989
Témata:
Arithmetic
Kernel
Multiplexing
Table lookup
On-line přístup:Získat plný text
Tagy: Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
Popis
Shrnutí:A theta (log n) algorithm for large moduli multiplication for residue-number-system (RNS)-based architectures is proposed. The modulo multiplier is much faster than previously proposed multipliers, and more area efficient. The implementation of the multiplier is modular and is based on simple cells, which leads to efficient VLSI realization. A VLSI implementation using 3- mu m CMOS process shows that a pipelined n-bit modulo multiplication scheme can operate with a throughput of 30M operations/s.< >
DOI:10.1109/MWSCAS.1989.101864