Mohan, M., & ., S. (2014). Design and VLSI Implementation of Multilayered Neural Network Architecture Using Parallel Processing and Pipelining Algorithm for Image Compression. I-Manager's Journal on Software Engineering, 8(3), 13-25. https://doi.org/10.26634/jse.8.3.2808
Citace podle Chicago (17th ed.)Mohan, Murali, a Sathyanarayana. "Design and VLSI Implementation of Multilayered Neural Network Architecture Using Parallel Processing and Pipelining Algorithm for Image Compression." I-Manager's Journal on Software Engineering 8, no. 3 (2014): 13-25. https://doi.org/10.26634/jse.8.3.2808.
Citace podle MLA (9th ed.)Mohan, Murali, a Sathyanarayana. "Design and VLSI Implementation of Multilayered Neural Network Architecture Using Parallel Processing and Pipelining Algorithm for Image Compression." I-Manager's Journal on Software Engineering, vol. 8, no. 3, 2014, pp. 13-25, https://doi.org/10.26634/jse.8.3.2808.