Parallel Hough Transform-Based Straight Line Detection and Its FPGA Implementation in Embedded Vision
Hough Transform has been widely used for straight line detection in low-definition and still images, but it suffers from execution time and resource requirements. Field Programmable Gate Arrays (FPGA) provide a competitive alternative for hardware acceleration to reap tremendous computing performanc...
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| Vydáno v: | Sensors (Basel, Switzerland) Ročník 13; číslo 7; s. 9223 - 9247 |
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17.07.2013
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| ISSN: | 1424-8220, 1424-8220 |
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| Abstract | Hough Transform has been widely used for straight line detection in low-definition and still images, but it suffers from execution time and resource requirements. Field Programmable Gate Arrays (FPGA) provide a competitive alternative for hardware acceleration to reap tremendous computing performance. In this paper, we propose a novel parallel Hough Transform (PHT) and FPGA architecture-associated framework for real-time straight line detection in high-definition videos. A resource-optimized Canny edge detection method with enhanced non-maximum suppression conditions is presented to suppress most possible false edges and obtain more accurate candidate edge pixels for subsequent accelerated computation. Then, a novel PHT algorithm exploiting spatial angle-level parallelism is proposed to upgrade computational accuracy by improving the minimum computational step. Moreover, the FPGA based multi-level pipelined PHT architecture optimized by spatial parallelism ensures real-time computation for 1,024 × 768 resolution videos without any off-chip memory consumption. This framework is evaluated on ALTERA DE2-115 FPGA evaluation platform at a maximum frequency of 200 MHz, and it can calculate straight line parameters in 15.59 ms on the average for one frame. Qualitative and quantitative evaluation results have validated the system performance regarding data throughput, memory bandwidth, resource, speed and robustness. |
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| AbstractList | Hough Transform has been widely used for straight line detection in low-definition and still images, but it suffers from execution time and resource requirements. Field Programmable Gate Arrays (FPGA) provide a competitive alternative for hardware acceleration to reap tremendous computing performance. In this paper, we propose a novel parallel Hough Transform (PHT) and FPGA architecture-associated framework for real-time straight line detection in high-definition videos. A resource-optimized Canny edge detection method with enhanced non-maximum suppression conditions is presented to suppress most possible false edges and obtain more accurate candidate edge pixels for subsequent accelerated computation. Then, a novel PHT algorithm exploiting spatial angle-level parallelism is proposed to upgrade computational accuracy by improving the minimum computational step. Moreover, the FPGA based multi-level pipelined PHT architecture optimized by spatial parallelism ensures real-time computation for 1,024 × 768 resolution videos without any off-chip memory consumption. This framework is evaluated on ALTERA DE2-115 FPGA evaluation platform at a maximum frequency of 200 MHz, and it can calculate straight line parameters in 15.59 ms on the average for one frame. Qualitative and quantitative evaluation results have validated the system performance regarding data throughput, memory bandwidth, resource, speed and robustness. Hough Transform has been widely used for straight line detection in low-definition and still images, but it suffers from execution time and resource requirements. Field Programmable Gate Arrays (FPGA) provide a competitive alternative for hardware acceleration to reap tremendous computing performance. In this paper, we propose a novel parallel Hough Transform (PHT) and FPGA architecture-associated framework for real-time straight line detection in high-definition videos. A resource-optimized Canny edge detection method with enhanced non-maximum suppression conditions is presented to suppress most possible false edges and obtain more accurate candidate edge pixels for subsequent accelerated computation. Then, a novel PHT algorithm exploiting spatial angle-level parallelism is proposed to upgrade computational accuracy by improving the minimum computational step. Moreover, the FPGA based multi-level pipelined PHT architecture optimized by spatial parallelism ensures real-time computation for 1,024 × 768 resolution videos without any off-chip memory consumption. This framework is evaluated on ALTERA DE2-115 FPGA evaluation platform at a maximum frequency of 200 MHz, and it can calculate straight line parameters in 15.59 ms on the average for one frame. Qualitative and quantitative evaluation results have validated the system performance regarding data throughput, memory bandwidth, resource, speed and robustness.Hough Transform has been widely used for straight line detection in low-definition and still images, but it suffers from execution time and resource requirements. Field Programmable Gate Arrays (FPGA) provide a competitive alternative for hardware acceleration to reap tremendous computing performance. In this paper, we propose a novel parallel Hough Transform (PHT) and FPGA architecture-associated framework for real-time straight line detection in high-definition videos. A resource-optimized Canny edge detection method with enhanced non-maximum suppression conditions is presented to suppress most possible false edges and obtain more accurate candidate edge pixels for subsequent accelerated computation. Then, a novel PHT algorithm exploiting spatial angle-level parallelism is proposed to upgrade computational accuracy by improving the minimum computational step. Moreover, the FPGA based multi-level pipelined PHT architecture optimized by spatial parallelism ensures real-time computation for 1,024 × 768 resolution videos without any off-chip memory consumption. This framework is evaluated on ALTERA DE2-115 FPGA evaluation platform at a maximum frequency of 200 MHz, and it can calculate straight line parameters in 15.59 ms on the average for one frame. Qualitative and quantitative evaluation results have validated the system performance regarding data throughput, memory bandwidth, resource, speed and robustness. |
| Author | Ling, Nam Lu, Xiaofeng Song, Li Shen, Sumin He, Kang Yu, Songyu |
| AuthorAffiliation | 2 School of Communication and Information Engineering, Shanghai University, Shanghai 200072, China; E-Mails: leo_shu@126.com (S.S.); hkzy2001@gmail.com (K.H.) 3 Department of Computer Engineering, Santa Clara University, Santa Clara, CA 95053-0566, USA; E-Mail: nling@scu.edu 1 Shanghai Key Laboratory of Digital Media Processing and Transmissions, Shanghai Jiao Tong University, Shanghai 200240, China; E-Mails: luxiaofeng@shu.edu.cn (X.L.); syyu@sjtu.edu.cn (S.Y.) |
| AuthorAffiliation_xml | – name: 3 Department of Computer Engineering, Santa Clara University, Santa Clara, CA 95053-0566, USA; E-Mail: nling@scu.edu – name: 2 School of Communication and Information Engineering, Shanghai University, Shanghai 200072, China; E-Mails: leo_shu@126.com (S.S.); hkzy2001@gmail.com (K.H.) – name: 1 Shanghai Key Laboratory of Digital Media Processing and Transmissions, Shanghai Jiao Tong University, Shanghai 200240, China; E-Mails: luxiaofeng@shu.edu.cn (X.L.); syyu@sjtu.edu.cn (S.Y.) |
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| SubjectTerms | Accuracy Algorithms Artificial Intelligence Canny edge detection Digital signal processors Electronic mail systems embedded vision Field programmable gate arrays FPGA Image Enhancement - methods Image Interpretation, Computer-Assisted - methods parallel Hough Transform Parameter estimation Pattern Recognition, Automated - methods Sensors straight line detection |
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| Title | Parallel Hough Transform-Based Straight Line Detection and Its FPGA Implementation in Embedded Vision |
| URI | https://www.ncbi.nlm.nih.gov/pubmed/23867746 https://www.proquest.com/docview/1539270336 https://www.proquest.com/docview/1411631918 https://pubmed.ncbi.nlm.nih.gov/PMC3758646 https://doaj.org/article/1b79052e3c514a8babc91855dc65e2ee |
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