Design of optimal disturbance rejection PID controllers using genetic algorithms
This paper presents a method to design an optimal disturbance rejection PID controller. First, a condition for disturbance rejection of a control system-H/sub /spl infin//-norm-is described. Second, the design is formulated as a constrained optimization problem. It consists of minimizing a performan...
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| Published in: | IEEE transactions on evolutionary computation Vol. 5; no. 1; pp. 78 - 82 |
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| Main Authors: | , |
| Format: | Journal Article |
| Language: | English |
| Published: |
New York, NY
IEEE
01.02.2001
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subjects: | |
| ISSN: | 1089-778X, 1941-0026 |
| Online Access: | Get full text |
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