FPGA Implementation of Orthogonal Matching Pursuit for Compressive Sensing Reconstruction
In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of...
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| Veröffentlicht in: | IEEE transactions on very large scale integration (VLSI) systems Jg. 23; H. 10; S. 2209 - 2220 |
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| Sprache: | Englisch |
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IEEE
01.10.2015
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
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| ISSN: | 1063-8210, 1557-9999 |
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| Abstract | In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix-vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves 25802 less slices and 1.85 times less computation time for signal reconstruction with N = 1024, K = 256, and m = 36, where N is the number of samples, K is the size of the measurement vector, and m is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of 0.34 μs, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction. |
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| AbstractList | In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix-vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves 25 802 less slices and 1.85 times less computation time for signal reconstruction with N = 1024, K = 256, and m = 36, where N is the number of samples, K is the size of the measurement vector, and m is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of 0.34 mu s, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction. In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix-vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves 25802 less slices and 1.85 times less computation time for signal reconstruction with N = 1024, K = 256, and m = 36, where N is the number of samples, K is the size of the measurement vector, and m is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of 0.34 μs, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction. In this paper, we present a novel architecture based on field-programmable gate arrays (FPGAs) for the reconstruction of compressively sensed signal using the orthogonal matching pursuit (OMP) algorithm. We have analyzed the computational complexities and data dependence between different stages of OMP algorithm to design its architecture that provides higher throughput with less area consumption. Since the solution of least square problem involves a large part of the overall computation time, we have suggested a parallel low-complexity architecture for the solution of the linear system. We have further modeled the proposed design using Simulink and carried out the implementation on FPGA using Xilinx system generator tool. We have presented here a methodology to optimize both area and execution time in Simulink environment. The execution time of the proposed design is reduced by maximizing parallelism by appropriate level of unfolding, while the FPGA resources are reduced by sharing the hardware for matrix-vector multiplication across the data-dependent sections of the algorithm. The hardware implementation on the Virtex6 FPGA provides significantly superior performance in terms of resource utilization measured in the number of occupied slices, and maximum usable frequency compared with the existing implementations. Compared with the existing similar design, the proposed structure involves 328 more DSP48s, but it involves [Formula Omitted] less slices and 1.85 times less computation time for signal reconstruction with [Formula Omitted], [Formula Omitted], and [Formula Omitted], where [Formula Omitted] is the number of samples, [Formula Omitted] is the size of the measurement vector, and [Formula Omitted] is the sparsity. It also provides a higher peak signal-to-noise ratio value of 38.9 dB with a reconstruction time of [Formula Omitted]s, which is twice faster than the existing design. In addition, we have presented a performance metric to implement the OMP algorithm in resource constrained FPGA for the better quality of signal reconstruction. |
| Author | Almaadeed, Somaya Amira, Abbes Hassan Rabah Mohanty, Basant Kumar Meher, Pramod Kumar |
| Author_xml | – sequence: 1 surname: Hassan Rabah fullname: Hassan Rabah email: hassan.rabah@univlorraine.fr organization: Inst. Jean Lamour, Univ. of Lorraine, Nancy, France – sequence: 2 givenname: Abbes surname: Amira fullname: Amira, Abbes email: abbes.amira@uws.ac.uk organization: Dept. of Comput. Sci. & Eng., Qatar Univ., Doha, Qatar – sequence: 3 givenname: Basant Kumar surname: Mohanty fullname: Mohanty, Basant Kumar email: bk.mohanti@juet.ac.in organization: Dept. of Electron. & Commun. Eng., Jaypee Univ. of Eng. & Technol., Guna, India – sequence: 4 givenname: Somaya surname: Almaadeed fullname: Almaadeed, Somaya email: s_alali@qu.edu.qa organization: Dept. of Comput. Sci. & Eng., Qatar Univ., Doha, Qatar – sequence: 5 givenname: Pramod Kumar surname: Meher fullname: Meher, Pramod Kumar email: aspkmeher@ntu.edu.sg organization: Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, Singapore |
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| Cites_doi | 10.1007/BF01585529 10.1109/ISSPA.2012.6310501 10.1109/JETCAS.2012.2214636 10.1109/TIT.2007.909108 10.1109/TSP.2011.2173682 10.1109/ISCAS.2012.6271921 10.1109/CISS.2009.5054716 10.1109/ISCAS.2011.5937688 10.1109/ICCNC.2013.6504167 10.1109/78.258082 10.1109/ISCAS.2010.5537976 10.1109/MSP.2007.914731 10.1186/1687-6180-2011-34 10.1109/ICECS.2012.6463559 10.1007/978-3-540-68111-3_15 |
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| Keywords | orthogonal matching pursuit (OMP) algorithm field-programmable gate array (FPGA) implementation hardware reconstruction Compressive sensing low-complexity architecture system-level modeling |
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| References | ref13 andrecut (ref9) 2009; 17 ref15 ref14 yang (ref12) 2009 ref22 ref10 ref2 braun (ref8) 2010; 7697 ref1 ref17 (ref19) 2012 ref16 (ref20) 2013 ref18 ref7 ref4 (ref21) 2012 ref3 ref6 ref5 happonen (ref11) 2004; 3 |
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| SubjectTerms | Algorithm design and analysis Algorithms Compressive sensing Computer architecture Engineering Sciences Field programmable gate arrays field-programmable gate array (FPGA) implementation hardware reconstruction low-complexity architecture Matching pursuit algorithms Matrix decomposition Micro and nanotechnologies Microelectronics Optimization orthogonal matching pursuit (OMP) algorithm Signal and Image processing Symmetric matrices system-level modeling Vectors |
| Title | FPGA Implementation of Orthogonal Matching Pursuit for Compressive Sensing Reconstruction |
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