Neural Compact Modeling Framework for Flexible Model Parameter Selection with High Accuracy and Fast SPICE Simulation

Neural compact models are proposed to simplify device‐modeling processes without requiring domain expertise. However, the existing models have certain limitations. Specifically, some models are not parameterized, while others compromise accuracy and speed, which limits their usefulness in multi‐devi...

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Vydáno v:Advanced intelligent systems Ročník 6; číslo 4
Hlavní autoři: Eom, Seungjoon, Yun, Hyeok, Jang, Hyundong, Cho, Kyeongrae, Lee, Seunghwan, Jeong, Jinsu, Baek, Rock‐Hyun
Médium: Journal Article
Jazyk:angličtina
Vydáno: Weinheim John Wiley & Sons, Inc 01.04.2024
Wiley
Témata:
Accuracy
Bias
compact models
Current voltage characteristics
Design
Gallium
Integrated circuits
machine learnings
Modelling
Neural networks
Parameters
Physics
Semiconductor devices
Simulation
technology computer‐aided designs
Thin film transistors
transistors
ISSN:2640-4567, 2640-4567
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Shrnutí:Neural compact models are proposed to simplify device‐modeling processes without requiring domain expertise. However, the existing models have certain limitations. Specifically, some models are not parameterized, while others compromise accuracy and speed, which limits their usefulness in multi‐device applications and reduces the quality of circuit simulations. To address these drawbacks, a neural compact modeling framework with a flexible selection of technology‐based model parameters using a two‐stage neural network (NN) architecture is proposed. The proposed neural compact model comprises two NN components: one utilizes model parameters to program the other, which can then describe the current–voltage (I–V) characteristics of the device. Unlike previous neural compact models, this two‐stage network structure enables high accuracy and fast simulation program with integrated circuit emphasis (SPICE) simulation without any trade‐off. The I–V characteristics of 1000 amorphous indium–gallium–zinc‐oxide thin‐film transistor devices with different properties obtained through fully calibrated technology computer‐aided design simulations are utilized to train and test the model and a highly precise neural compact model with an average IDS error of 0.27% and R2 DC characteristic values above 0.995 is acquired. Moreover, the proposed framework outperforms the previous neural compact modeling methods in terms of SPICE simulation speed, training speed, and accuracy. Neural compact models simplify device modeling, but they often compromise accuracy and speed. Herein, a neural compact modeling framework with flexible technology‐based model parameter selection using a two‐stage neural network architecture is proposed. The proposed model achieves high accuracy and fast simulation program with integrated circuit emphasis (SPICE) simulation without any trade‐off, outperforming previous methods in terms of SPICE simulation speed, training speed, and accuracy.
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ISSN:2640-4567
2640-4567
DOI:10.1002/aisy.202300435