A vertex centric parallel algorithm for linear temporal logic model checking in Pregel
Linear Temporal Logic (LTL) Model Checking is a very important and popular technique for the automatic verification of safety-critical hardware and software systems, aiming at ensuring their quality. However, it is well known that LTL model checking suffers from the state explosion problem, often le...
Uložené v:
| Vydané v: | Journal of parallel and distributed computing Ročník 74; číslo 11; s. 3161 - 3174 |
|---|---|
| Hlavní autori: | , , , |
| Médium: | Journal Article |
| Jazyk: | English |
| Vydavateľské údaje: |
Elsevier Inc
01.11.2014
|
| Predmet: | |
| ISSN: | 0743-7315, 1096-0848 |
| On-line prístup: | Získať plný text |
| Tagy: |
Pridať tag
Žiadne tagy, Buďte prvý, kto otaguje tento záznam!
|
Buďte prvý, kto okomentuje tento záznam!