A vertex centric parallel algorithm for linear temporal logic model checking in Pregel
Linear Temporal Logic (LTL) Model Checking is a very important and popular technique for the automatic verification of safety-critical hardware and software systems, aiming at ensuring their quality. However, it is well known that LTL model checking suffers from the state explosion problem, often le...
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| Veröffentlicht in: | Journal of parallel and distributed computing Jg. 74; H. 11; S. 3161 - 3174 |
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01.11.2014
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| Abstract | Linear Temporal Logic (LTL) Model Checking is a very important and popular technique for the automatic verification of safety-critical hardware and software systems, aiming at ensuring their quality. However, it is well known that LTL model checking suffers from the state explosion problem, often leading to insurmountable scalability problems when applying it to real-world systems. While there has been work on distributed algorithms for explicit on-the-fly LTL model checking, these are not sufficiently scalable and capable of tolerating faults during computation, significantly limiting their usefulness in huge cluster environments. Moreover, implementing these algorithms is generally viewed as a very challenging, error-prone task. In this paper, we instead rely on Pregel, a simple yet powerful model for distributed computation on large graphs. Pregel has from the start been designed for efficient, scalable and fault tolerant operation on clusters of thousands of computers, including large cloud setups. To harness Pregel’s power, we propose a new vertex centric distributed algorithm for explicit LTL model checking of concurrent systems. Experimental results illustrate feasibility and scalability of the proposed algorithm. Compared with other distributed algorithms, our algorithm is more scalable, reliable and efficient.
•We propose a new vertex centric distributed algorithm for LTL model checking.•Algorithm is designed for BSP model and can be implemented in Pregel.•The whole model checking procedure can be highly paralleled by BFS.•Our algorithm is more scalable, reliable, efficient and expressive.•Our proposed algorithm opens the door to reliable model checking implementations. |
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| AbstractList | Linear Temporal Logic (LTL) Model Checking is a very important and popular technique for the automatic verification of safety-critical hardware and software systems, aiming at ensuring their quality. However, it is well known that LTL model checking suffers from the state explosion problem, often leading to insurmountable scalability problems when applying it to real-world systems. While there has been work on distributed algorithms for explicit on-the-fly LTL model checking, these are not sufficiently scalable and capable of tolerating faults during computation, significantly limiting their usefulness in huge cluster environments. Moreover, implementing these algorithms is generally viewed as a very challenging, error-prone task. In this paper, we instead rely on Pregel, a simple yet powerful model for distributed computation on large graphs. Pregel has from the start been designed for efficient, scalable and fault tolerant operation on clusters of thousands of computers, including large cloud setups. To harness Pregel’s power, we propose a new vertex centric distributed algorithm for explicit LTL model checking of concurrent systems. Experimental results illustrate feasibility and scalability of the proposed algorithm. Compared with other distributed algorithms, our algorithm is more scalable, reliable and efficient.
•We propose a new vertex centric distributed algorithm for LTL model checking.•Algorithm is designed for BSP model and can be implemented in Pregel.•The whole model checking procedure can be highly paralleled by BFS.•Our algorithm is more scalable, reliable, efficient and expressive.•Our proposed algorithm opens the door to reliable model checking implementations. |
| Author | Xie, Miao Zhai, Jian Wang, Qing Yang, Qiusong |
| Author_xml | – sequence: 1 givenname: Miao surname: Xie fullname: Xie, Miao email: xiemiao@nfs.iscas.ac.cn organization: National Engineering Research Center of Fundamental Software, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China – sequence: 2 givenname: Qiusong surname: Yang fullname: Yang, Qiusong email: qiusong@nfs.iscas.ac.cn organization: National Engineering Research Center of Fundamental Software, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China – sequence: 3 givenname: Jian surname: Zhai fullname: Zhai, Jian email: zhaijian@nfs.iscas.ac.cn organization: National Engineering Research Center of Fundamental Software, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China – sequence: 4 givenname: Qing surname: Wang fullname: Wang, Qing email: wq@nfs.iscas.ac.cn organization: National Engineering Research Center of Fundamental Software, Institute of Software, Chinese Academy of Sciences, Beijing 100190, China |
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| Keywords | Model checking Formal method Reliable model checker Scalable algorithm Distributed memory algorithm Linear temporal logic |
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| SubjectTerms | Distributed memory algorithm Formal method Linear temporal logic Model checking Reliable model checker Scalable algorithm |
| Title | A vertex centric parallel algorithm for linear temporal logic model checking in Pregel |
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