Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype

The literature on the subject of synchrophasor estimation (SE) algorithms has discussed the use of interpolated discrete Fourier transform (IpDFT) as an approach capable to find an optimal tradeoff between SE accuracy, response time, and computational complexity. Within this category of algorithms,...

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Published in:	IEEE transactions on instrumentation and measurement Vol. 63; no. 12; pp. 2824 - 2836
Main Authors:	Romano, Paolo, Paolone, Mario
Format:	Journal Article
Language:	English
Published:	New York IEEE 01.12.2014 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Accuracy Algorithm design and analysis Algorithms Assessments Categories Compensation Discrete Fourier transform (DFT) Discrete Fourier transforms field programmable gate array (FPGA) Field programmable gate arrays Global Positioning System IEEE standards IEEE Std. C37.118 Instrumentation interpolated discrete Fourier transform (IpDFT) phasor measurement unit (PMU) Phasor measurement units Programmable logic controllers synchrophasor Discrete Fourier transform (DFT) interpolated discrete Fourier transform (IpDFT) field programmable gate array (FPGA) synchrophasor IEEE Std. C37.118 phasor measurement unit (PMU)
ISSN:	0018-9456, 1557-9662
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Abstract	The literature on the subject of synchrophasor estimation (SE) algorithms has discussed the use of interpolated discrete Fourier transform (IpDFT) as an approach capable to find an optimal tradeoff between SE accuracy, response time, and computational complexity. Within this category of algorithms, this paper proposes three contributions: the formulation of an enhanced-IpDFT (e-IpDFT) algorithm that iteratively compensates the effects of the spectral interference produced by the negative image of the main spectrum tone; the assessment of the influence of the e-IpDFT parameters on the SE accuracy; and the discussion of the deployment of IpDFT-based SE algorithms into field programmable gate arrays, with particular reference to the compensation of the error introduced by the free-running clock of A/D converters with respect to the global positioning system (GPS) time reference. The paper finally presents the experimental validation of the proposed approach where the e-IpDFT performances are compared with those of a classical IpDFT approach and to the accuracy requirements of both P and M-class phasor measurement units defined in the IEEE Std. C37.118-2011.
AbstractList	The literature on the subject of synchrophasor estimation (SE) algorithms has discussed the use of interpolated discrete Fourier transform (IpDFT) as an approach capable to find an optimal tradeoff between SE accuracy, response time, and computational complexity. Within this category of algorithms, this paper proposes three contributions: 1) the formulation of an enhanced-IpDFT (e-IpDFT) algorithm that iteratively compensates the effects of the spectral interference produced by the negative image of the main spectrum tone; 2) the assessment of the influence of the e-IpDFT parameters on the SE accuracy; and 3) the discussion of the deployment of IpDFT-based SE algorithms into field programmable gate arrays, with particular reference to the compensation of the error introduced by the free-running clock of A/D converters with respect to the global positioning system (GPS) time reference. The paper finally presents the experimental validation of the proposed approach where the e-IpDFT performances are compared with those of a classical IpDFT approach and to the accuracy requirements of both P and M-class phasor measurement units defined in the IEEE Std. C37.118-2011. The literature on the subject of synchrophasor estimation (SE) algorithms has discussed the use of interpolated discrete Fourier transform (IpDFT) as an approach capable to find an optimal tradeoff between SE accuracy, response time, and computational complexity. Within this category of algorithms, this paper proposes three contributions: the formulation of an enhanced-IpDFT (e-IpDFT) algorithm that iteratively compensates the effects of the spectral interference produced by the negative image of the main spectrum tone; the assessment of the influence of the e-IpDFT parameters on the SE accuracy; and the discussion of the deployment of IpDFT-based SE algorithms into field programmable gate arrays, with particular reference to the compensation of the error introduced by the free-running clock of A/D converters with respect to the global positioning system (GPS) time reference. The paper finally presents the experimental validation of the proposed approach where the e-IpDFT performances are compared with those of a classical IpDFT approach and to the accuracy requirements of both P and M-class phasor measurement units defined in the IEEE Std. C37.118-2011.
Author	Romano, Paolo Paolone, Mario
Author_xml	– sequence: 1 givenname: Paolo surname: Romano fullname: Romano, Paolo email: paolo.romano@epfl.ch organization: Distrib. Electr. Syst. Lab., Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland – sequence: 2 givenname: Mario surname: Paolone fullname: Paolone, Mario email: mario.paolone@epfl.ch organization: Distrib. Electr. Syst. Lab., Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
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SubjectTerms	Accuracy Algorithm design and analysis Algorithms Assessments Categories Compensation Discrete Fourier transform (DFT) Discrete Fourier transforms field programmable gate array (FPGA) Field programmable gate arrays Global Positioning System IEEE standards IEEE Std. C37.118 Instrumentation interpolated discrete Fourier transform (IpDFT) phasor measurement unit (PMU) Phasor measurement units Programmable logic controllers synchrophasor
Title	Enhanced Interpolated-DFT for Synchrophasor Estimation in FPGAs: Theory, Implementation, and Validation of a PMU Prototype
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