An efficient crossover architecture for hardware parallel implementation of genetic algorithm

In this article a new architecture for hardware implementation of genetic algorithm in reconfigurable embedded systems is presented. The main idea is based on the efficient use of a genetic algorithm's crossover operator to enhance the speed of algorithm to reach an optimal solution. In this ar...

Celý popis

Uloženo v:

Podrobná bibliografie
Vydáno v:	Neurocomputing (Amsterdam) Ročník 128; s. 316 - 327
Hlavní autoři:	Faraji, Rasoul, Naji, Hamid Reza
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	Amsterdam Elsevier B.V 27.03.2014 Elsevier
Témata:	Algorithmics. Computability. Computer arithmetics Algorithms Applied sciences Architecture Architecture (computers) Computer science; control theory; systems Crossover operator Crossovers Exact sciences and technology FPGA Genetic algorithm Genetic algorithms Hardware Operators Optimization Theoretical computing Genetic algorithm FPGA Crossover operator Optimal algorithm Reuse Field programmable gate array Optimization Circuit architecture Boarded computer Optimal solution Problem solving Parallelism Reconfigurable architectures
ISSN:	0925-2312, 1872-8286
On-line přístup:	Získat plný text
Tagy:	Přidat tag Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!

Buďte první, kdo okomentuje tento záznam!