Parallel algorithm for setting WIP levels for multi-product CONWIP systems

Reducing work-in-process (WIP) inventory is continuing to be an important business need because of several factors including the need to reduce working capital. Numerous techniques have been suggested for WIP reduction, and CONWIP is a competitive algorithm for WIP reduction. Prior CONWIP algorithms...

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Vydané v:International journal of production research Ročník 44; číslo 21; s. 4681 - 4693
Hlavní autori: Wang, L., Prabhu, V.
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: London Taylor & Francis Group 01.11.2006
Washington, DC Taylor & Francis
Taylor & Francis LLC
Predmet:
Algorithms
Applied sciences
Computer science; control theory; systems
Distributed computer memory system
Distributed processing
Exact sciences and technology
Inventory control, production control. Distribution
Memory and file management (including protection and security)
Memory organisation. Data processing
Message Passing Interface (MPI)
Multi-product CONWIP systems
Operational research and scientific management
Operational research. Management science
Parallel algorithm
Queuing theory
Queuing theory. Traffic theory
Software
Speed-up
Studies
Work in process
Multi-product CONWIP systems
Parallel algorithm
Distributed computer memory system
Speed-up
Message Passing Interface (MPI)
Message passing interface
Distributed memory systems
In-process inventory
Competitive algorithms
Message transmission
Search algorithm
ISSN:0020-7543, 1366-588X
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Popis
Shrnutí:Reducing work-in-process (WIP) inventory is continuing to be an important business need because of several factors including the need to reduce working capital. Numerous techniques have been suggested for WIP reduction, and CONWIP is a competitive algorithm for WIP reduction. Prior CONWIP algorithms have been primarily sequential algorithms and can be potentially incur significant computing time, especially when dealing with inventories for multiple products. The paper proposes a card-setting algorithm for multiple product types subject to routing and throughput requirements. The proposed algorithm searches the WIP space iteratively and the step-size is adaptively selected based on the known properties of multi-chain, multi-class, closed queuing networks. Furthermore, parallelization of this search algorithm across multiple processors is proposed where each processor searches a different segment of the WIP space while adaptively adjusting its step size for all product types to ensure fast convergence. The proposed parallel algorithm can take advantage of distributed computing architectures to speed-up the overall computation. An experimental implementation of the parallel algorithm using Message Passing Interface (MPI) over a high-speed network is described. Computational results demonstrate that the proposed parallel algorithm can be parallelized over eight to ten processors to obtain a speed-up of three to five.
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ISSN:0020-7543
1366-588X
DOI:10.1080/00207540500490970