Hardware and software architectures for computationally efficient three-dimensional ultrasonic data compression

Ultrasonic industrial and medical imaging applications involve acquisition of large amount of volumetric data in real time. Therefore, data storage becomes critical in many current day applications which utilise ultrasound technology. Compressing the acquired data allows possessing minimal storage a...

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Vydáno v:IET circuits, devices & systems Ročník 10; číslo 1; s. 54 - 61
Hlavní autoři: Govindan, Pramod, Wang, Boyang, Ravi, Prashaanth, Saniie, Jafar
Médium: Journal Article
Jazyk:angličtina
Vydáno: Stevenage The Institution of Engineering and Technology 01.01.2016
John Wiley & Sons, Inc
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ISSN:1751-858X, 1751-8598, 1751-8598
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Abstract Ultrasonic industrial and medical imaging applications involve acquisition of large amount of volumetric data in real time. Therefore, data storage becomes critical in many current day applications which utilise ultrasound technology. Compressing the acquired data allows possessing minimal storage and also helps to rapidly transmit information to remote locations for expert analysis. The objective of this study is to design computationally efficient architectures for implementing discrete wavelet transform-based ultrasonic three-dimensional (3D) data compression algorithm on a reconfigurable ultrasonic system-on-chip (SoC) hardware platform. In this study, hardware and software architectures of the 3D ultrasonic compression algorithm are realised using Xilinx Zynq all programmable SoC. This study demonstrates that, compressing 33 MB of experimental ultrasonic 3D data into 0.42 MB (98.7% compression) requires only 84 ms for hardware architecture, and 1 min for software architecture, making both designs highly suitable for real-time ultrasonic imaging applications. Furthermore, the 3D compression is implemented by using Open Computing Language (OpenCL) targeted on Nvidia GT 750M graphical processing unit. OpenCL implementation of ultrasonic 3D compression algorithm completes the execution in <1 sec. This approach provides improved computational performance as that of hardware architecture, and comparable flexibility as that of software implementation.
AbstractList Ultrasonic industrial and medical imaging applications involve acquisition of large amount of volumetric data in real time. Therefore, data storage becomes critical in many current day applications which utilise ultrasound technology. Compressing the acquired data allows possessing minimal storage and also helps to rapidly transmit information to remote locations for expert analysis. The objective of this study is to design computationally efficient architectures for implementing discrete wavelet transform‐based ultrasonic three‐dimensional (3D) data compression algorithm on a reconfigurable ultrasonic system‐on‐chip (SoC) hardware platform. In this study, hardware and software architectures of the 3D ultrasonic compression algorithm are realised using Xilinx Zynq all programmable SoC. This study demonstrates that, compressing 33 MB of experimental ultrasonic 3D data into 0.42 MB (98.7% compression) requires only 84 ms for hardware architecture, and 1 min for software architecture, making both designs highly suitable for real‐time ultrasonic imaging applications. Furthermore, the 3D compression is implemented by using Open Computing Language (OpenCL) targeted on Nvidia GT 750M graphical processing unit. OpenCL implementation of ultrasonic 3D compression algorithm completes the execution in <1 sec. This approach provides improved computational performance as that of hardware architecture, and comparable flexibility as that of software implementation.
Author Wang, Boyang
Saniie, Jafar
Govindan, Pramod
Ravi, Prashaanth
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  surname: Govindan
  fullname: Govindan, Pramod
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  givenname: Boyang
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  givenname: Prashaanth
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  organization: Department of Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616, USA
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  surname: Saniie
  fullname: Saniie, Jafar
  email: sansonic@ece.iit.edu
  organization: Department of Electrical and Computer Engineering, Illinois Institute of Technology, Chicago, IL 60616, USA
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Issue 1
Keywords data compression
realtime ultrasonic imaging application
discrete wavelet transforms
ultrasound technology
Nvidia GT 750M
3D ultrasonic data compression algorithm
graphical processing unit
discrete wavelet transform
graphics processing units
volumetric data
industrial application
software architecture
medical imaging application
data storage
open computing language
SoC hardware platform
hardware architecture
reconfigurable ultrasonic system-on-chip
OpenCL
three-dimensional ultrasonic data compression
system-on-chip
Xilinx Zynq
ultrasonic imaging
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Snippet Ultrasonic industrial and medical imaging applications involve acquisition of large amount of volumetric data in real time. Therefore, data storage becomes...
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SubjectTerms 3D ultrasonic data compression algorithm
Algorithms
Architecture (computers)
Compressing
Computational efficiency
Computer programs
Data acquisition
Data compression
Data storage
Design
Dimensional analysis
Discrete Wavelet Transform
discrete wavelet transforms
Embedded systems
Field programmable gate arrays
Flexibility
graphical processing unit
Graphics processing units
Hardware
hardware architecture
Image acquisition
Image coding
industrial application
Medical imaging
medical imaging application
Nvidia GT 750M
open computing language
OpenCL
realtime ultrasonic imaging application
reconfigurable ultrasonic system-on-chip
Signal processing
SoC hardware platform
Software
software architecture
System on chip
Technology assessment
Three dimensional
three-dimensional ultrasonic data compression
Ultrasonic imaging
ultrasound technology
Video compression
volumetric data
Wavelet analysis
Wavelet transforms
Xilinx Zynq
Title Hardware and software architectures for computationally efficient three-dimensional ultrasonic data compression
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