All-Digital Calibration of Timing Skews for TIADCs Using the Polyphase Decomposition
This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not requi...
Saved in:
| Published in: | IEEE transactions on circuits and systems. II, Express briefs Vol. 63; no. 1; pp. 99 - 103 |
|---|---|
| Main Authors: | , , , , , , |
| Format: | Journal Article |
| Language: | English |
| Published: |
New York
IEEE
01.01.2016
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Institute of Electrical and Electronics Engineers |
| Subjects: | |
| ISSN: | 1549-7747, 1558-3791 |
| Online Access: | Get full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Abstract | This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not require the adaptive digital synthesis filters. The timing mismatch is estimated based on an adaptive stochastic gradient descent technique, which is a promising solution for TIADCs operating at a very fast sampling rate. The digital circuit of the proposed calibration algorithm is designed and synthesized using a 28-nm fully depleted Silicon on insulator (FD-SOI) CMOS technology for the 11-b 60-dB SNR TIADC clocked at 2.7 GHz with the input in the first four NBs. The designed circuit occupies the area of 0.05 mm 2 and dissipates the total power of 41 mW. |
|---|---|
| AbstractList | This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not require the adaptive digital synthesis filters. The timing mismatch is estimated based on an adaptive stochastic gradient descent technique, which is a promising solution for TIADCs operating at a very fast sampling rate. The digital circuit of the proposed calibration algorithm is designed and synthesized using a 28-nm fully depleted Silicon on insulator (FD-SOI) CMOS technology for the 11-b 60-dB SNR TIADC clocked at 2.7 GHz with the input in the first four NBs. The designed circuit occupies the area of 0.05 mm2 and dissipates the total power of 41 mW. This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not require the adaptive digital synthesis filters. The timing mismatch is estimated based on an adaptive stochastic gradient descent technique, which is a promising solution for TIADCs operating at a very fast sampling rate. The digital circuit of the proposed calibration algorithm is designed and synthesized using a 28-nm fully depleted Silicon on insulator (FD-SOI) CMOS technology for the 11-b 60-dB SNR TIADC clocked at 2.7 GHz with the input in the first four NBs. The designed circuit occupies the area of 0.05 mm super(2) and dissipates the total power of 41 mW. This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs) for input at any Nyquist band (NB) using the equivalent polyphase structure of the TIADC. The correction technique is simple and does not require the adaptive digital synthesis filters. The timing mismatch is estimated based on an adaptive stochastic gradient descent technique, which is a promising solution for TIADCs operating at a very fast sampling rate. The digital circuit of the proposed calibration algorithm is designed and synthesized using a 28-nm fully depleted Silicon on insulator (FD-SOI) CMOS technology for the 11-b 60-dB SNR TIADC clocked at 2.7 GHz with the input in the first four NBs. The designed circuit occupies the area of 0.05 mm 2 and dissipates the total power of 41 mW. |
| Author | Graba, Tarik Duc Minh Nguyen Jabbour, Chadi Desgreys, Patricia Han Le Duc Jamin, Olivier Van Tam Nguyen |
| Author_xml | – sequence: 1 surname: Han Le Duc fullname: Han Le Duc email: han.le-duc@telecom-paristech.fr organization: Dept. of Comelec, Inst. Mines-Telecom, Paris, France – sequence: 2 surname: Duc Minh Nguyen fullname: Duc Minh Nguyen organization: Dept. of Comelec, Inst. Mines-Telecom, Paris, France – sequence: 3 givenname: Chadi surname: Jabbour fullname: Jabbour, Chadi organization: Nokia Technol., Berkeley, CA, USA – sequence: 4 givenname: Tarik surname: Graba fullname: Graba, Tarik organization: Dept. of Comelec, Inst. Mines-Telecom, Paris, France – sequence: 5 givenname: Patricia surname: Desgreys fullname: Desgreys, Patricia organization: Dept. of Comelec, Inst. Mines-Telecom, Paris, France – sequence: 6 givenname: Olivier surname: Jamin fullname: Jamin, Olivier organization: NXP Semicond., Caen, France – sequence: 7 surname: Van Tam Nguyen fullname: Van Tam Nguyen organization: Dept. of Comelec, Inst. Mines-Telecom, Paris, France |
| BackLink | https://imt.hal.science/hal-01271601$$DView record in HAL |
| BookMark | eNp9kU1P3DAQhi1EpQLlD5SLpV7aQ7Yef8TxcZVty0orFYlwtpwwYU298dbOUvHvm3QRBw492Ro9j2c87zk5HeKAhHwEtgBg5mtT367XC85ALbishOTihJyBUlUhtIHT-S5NobXU78l5zo-MccMEPyPNMoRi5R_86AKtXfBtcqOPA409bfzODw_09hf-ybSPiTbr5arO9C7P5XGL9CaG5_3WZaQr7OJuH7Of5Q_kXe9CxsuX84Lcff_W1NfF5uePdb3cFJ3k1Vg4pYwxpVCOdewe21YpIQ1w3t9rBK0ZViUoDZXAruyU5qrFvhNlWTroW-jFBflyfHfrgt0nv3Pp2Ubn7fVyY-caA66hZPAEE_v5yO5T_H3APNqdzx2G4AaMh2xBz81kCWZCP71BH-MhDdNPJkpxJpk0eqL4kepSzDlh_zoBMDuHYv-FYudQ7Esok1S9kbpp8_POxuR8-L96dVQ9Ir720lwbpo34C_GpmWA |
| CODEN | ICSPE5 |
| CitedBy_id | crossref_primary_10_1109_TCSII_2019_2897759 crossref_primary_10_1109_TVLSI_2017_2703141 crossref_primary_10_1049_el_2020_0425 crossref_primary_10_1049_iet_cds_2018_5194 crossref_primary_10_1109_TCSII_2024_3401448 crossref_primary_10_1109_TIM_2023_3346515 crossref_primary_10_1109_TSP_2022_3210721 crossref_primary_10_1109_TCSI_2016_2538061 crossref_primary_10_1007_s00034_024_02873_1 crossref_primary_10_1109_ACCESS_2019_2949701 crossref_primary_10_1109_ACCESS_2024_3437748 crossref_primary_10_1007_s00034_022_02228_8 crossref_primary_10_1109_TCSII_2020_3023810 crossref_primary_10_1109_JSSC_2019_2945298 crossref_primary_10_1109_TCSI_2016_2645978 crossref_primary_10_1049_iet_cds_2018_5560 crossref_primary_10_1109_TIM_2025_3604984 crossref_primary_10_1016_j_aeue_2020_153574 crossref_primary_10_1109_TCSII_2016_2562184 crossref_primary_10_1016_j_vlsi_2019_11_009 crossref_primary_10_1109_TCSII_2017_2662084 crossref_primary_10_1109_TCSII_2022_3160736 crossref_primary_10_1007_s41365_021_00863_5 crossref_primary_10_1016_j_measurement_2021_109554 crossref_primary_10_1109_TVLSI_2024_3355316 crossref_primary_10_1109_TCSI_2018_2794529 crossref_primary_10_1109_TCSII_2018_2828649 crossref_primary_10_1109_TIM_2024_3376008 crossref_primary_10_1109_ACCESS_2019_2923157 crossref_primary_10_1109_TCSII_2022_3167426 |
| Cites_doi | 10.1109/TCSI.2009.2015206 10.1109/ISCAS.2010.5537632 10.1109/TCSI.2011.2177003 10.1109/CICC.2007.4405745 10.1007/978-1-4614-0113-1 10.1109/JSSC.2011.2164961 10.1109/TCSI.2006.888770 10.1109/ISCAS.2015.7169113 10.1109/TCSI.2013.2249176 10.1109/JSSC.2013.2258814 |
| ContentType | Journal Article |
| Copyright | Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016 Distributed under a Creative Commons Attribution 4.0 International License |
| Copyright_xml | – notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2016 – notice: Distributed under a Creative Commons Attribution 4.0 International License |
| DBID | 97E RIA RIE AAYXX CITATION 7SP 8FD L7M F28 FR3 1XC |
| DOI | 10.1109/TCSII.2015.2483423 |
| DatabaseName | IEEE All-Society Periodicals Package (ASPP) 2005–Present IEEE All-Society Periodicals Package (ASPP) 1998–Present IEEE Electronic Library (IEL) CrossRef Electronics & Communications Abstracts Technology Research Database Advanced Technologies Database with Aerospace ANTE: Abstracts in New Technology & Engineering Engineering Research Database Hyper Article en Ligne (HAL) |
| DatabaseTitle | CrossRef Technology Research Database Advanced Technologies Database with Aerospace Electronics & Communications Abstracts Engineering Research Database ANTE: Abstracts in New Technology & Engineering |
| DatabaseTitleList | Engineering Research Database Technology Research Database |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Engineering |
| EISSN | 1558-3791 |
| EndPage | 103 |
| ExternalDocumentID | oai:HAL:hal-01271601v1 3905989971 10_1109_TCSII_2015_2483423 7279079 |
| Genre | orig-research |
| GrantInformation_xml | – fundername: European Catrene AppsGate |
| GroupedDBID | 0R~ 29I 4.4 5VS 6IK 6J9 97E AAJGR AARMG AASAJ AAWTH ABAZT ABQJQ ABVLG ACIWK AETIX AGQYO AGSQL AHBIQ AIBXA AKJIK AKQYR ALMA_UNASSIGNED_HOLDINGS ATWAV BEFXN BFFAM BGNUA BKEBE BPEOZ EBS EJD IFIPE IPLJI JAVBF M43 OCL PZZ RIA RIE RNS RXW TAE TAF VJK AAYXX CITATION 7SP 8FD L7M F28 FR3 1XC |
| ID | FETCH-LOGICAL-c428t-a55999635a0c0debb55349122fd7e1770e86157183ec6c5725befc3666a1fb1f3 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 62 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000367258800021&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| ISSN | 1549-7747 |
| IngestDate | Tue Oct 14 20:56:31 EDT 2025 Sat Sep 27 16:57:03 EDT 2025 Sun Oct 05 00:31:11 EDT 2025 Tue Nov 18 22:32:14 EST 2025 Sat Nov 29 02:23:01 EST 2025 Tue Aug 26 16:43:19 EDT 2025 |
| IsPeerReviewed | true |
| IsScholarly | true |
| Issue | 1 |
| Keywords | timing skew calibration polyphase filtering undersampling time-interleaved analog-to-digital converters (TIADCs) Field-programmable gate array (FPGA)/application-specific-integrated-circuit (ASIC) implementation |
| Language | English |
| License | https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html Distributed under a Creative Commons Attribution 4.0 International License: http://creativecommons.org/licenses/by/4.0 |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-c428t-a55999635a0c0debb55349122fd7e1770e86157183ec6c5725befc3666a1fb1f3 |
| Notes | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 content type line 23 |
| ORCID | 0000-0003-3884-9520 0000-0001-8819-5532 |
| PQID | 1752040497 |
| PQPubID | 85412 |
| PageCount | 5 |
| ParticipantIDs | proquest_miscellaneous_1786154619 crossref_primary_10_1109_TCSII_2015_2483423 crossref_citationtrail_10_1109_TCSII_2015_2483423 ieee_primary_7279079 proquest_journals_1752040497 hal_primary_oai_HAL_hal_01271601v1 |
| PublicationCentury | 2000 |
| PublicationDate | 2016-Jan. 2016-1-00 20160101 2016-01 |
| PublicationDateYYYYMMDD | 2016-01-01 |
| PublicationDate_xml | – month: 01 year: 2016 text: 2016-Jan. |
| PublicationDecade | 2010 |
| PublicationPlace | New York |
| PublicationPlace_xml | – name: New York |
| PublicationTitle | IEEE transactions on circuits and systems. II, Express briefs |
| PublicationTitleAbbrev | TCSII |
| PublicationYear | 2016 |
| Publisher | IEEE The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Institute of Electrical and Electronics Engineers |
| Publisher_xml | – name: IEEE – name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE) – name: Institute of Electrical and Electronics Engineers |
| References | ref13 venosa (ref8) 2012 ref11 ref10 ref2 ref1 le dortz (ref6) 0 ref7 ref4 ref3 ref5 le duc (ref9) 0 proakis (ref12) 2006 |
| References_xml | – ident: ref2 doi: 10.1109/TCSI.2009.2015206 – start-page: 53 year: 0 ident: ref9 article-title: A fully digital background calibration of timing skew in undersampling TI-ADC publication-title: Proc IEEE 12th NEWCAS – start-page: 386 year: 0 ident: ref6 article-title: 22.5 A 1.62 GS/s time-interleaved SAR ADC with digital background mismatch calibration achieving interleaving spurs below 70 dBFS publication-title: Proc IEEE ISSCC Dig Tech Papers – year: 2006 ident: ref12 publication-title: Digital Signal Processing – ident: ref4 doi: 10.1109/ISCAS.2010.5537632 – ident: ref7 doi: 10.1109/TCSI.2011.2177003 – ident: ref11 doi: 10.1109/CICC.2007.4405745 – year: 2012 ident: ref8 publication-title: Software Radio Sampling Rate Selection Design and Synchronization doi: 10.1007/978-1-4614-0113-1 – ident: ref13 doi: 10.1109/JSSC.2011.2164961 – ident: ref3 doi: 10.1109/TCSI.2006.888770 – ident: ref10 doi: 10.1109/ISCAS.2015.7169113 – ident: ref5 doi: 10.1109/TCSI.2013.2249176 – ident: ref1 doi: 10.1109/JSSC.2013.2258814 |
| SSID | ssj0029032 |
| Score | 2.368748 |
| Snippet | This brief proposes a new all-digital calibration technique suppressing the timing mismatch effect in time-interleaved analog-to-digital converters (TIADCs)... |
| SourceID | hal proquest crossref ieee |
| SourceType | Open Access Repository Aggregation Database Enrichment Source Index Database Publisher |
| StartPage | 99 |
| SubjectTerms | Algorithms Calibration Circuits Convergence Depletion Digital circuits Dissipation Electronics Engineering Sciences Finite impulse response filters FPGA/ASIC implementation Niobium polyphase filtering Sampling Time measurements Time-frequency analysis Timing Timing skews calibration Undersampling TIADCs |
| Title | All-Digital Calibration of Timing Skews for TIADCs Using the Polyphase Decomposition |
| URI | https://ieeexplore.ieee.org/document/7279079 https://www.proquest.com/docview/1752040497 https://www.proquest.com/docview/1786154619 https://imt.hal.science/hal-01271601 |
| Volume | 63 |
| WOSCitedRecordID | wos000367258800021&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVIEE databaseName: IEEE Electronic Library (IEL) customDbUrl: eissn: 1558-3791 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0029032 issn: 1549-7747 databaseCode: RIE dateStart: 20040101 isFulltext: true titleUrlDefault: https://ieeexplore.ieee.org/ providerName: IEEE |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3dS-QwEB_c5R70Qc8vXPUkJ75ptU3bzeZx2T1xQUSwgm8lSRMVl624H-B_70zaLcrJwb2VdlpCfs3Mb5L5ADjpOpcUSkvUfkUaJLwQgUIeGxQCVaaOlUyrIknX4uam9_Agb1fgrMmFsdb64DN7Tpf-LL8ozZy2yi7Q1qIvJ1vQEqJb5Wo1zpUMfTMyqjiGjDERywSZUF5kg7vRiKK40nNOe2c8_mKEWk8UAul7q_ylkL2Vudz4v_H9hPWaTbJ-Bf8mrNjJFqx9qjG4DVl_PA6Gz4_UHIRRJpauMGelYxm19Hpkdy-o6RiyV5aN-sPBlPk4AobUkN2W4_fXJ7R0bGgp-rwO8dqB-8s_2eAqqFspBAb9i1mgqLAYrrVUhSYsrNZpGicy4twVwkZChLaH1AbtVGxN16SCp9o6E6NvoyKnIxfvQntSTuweMG1j5YhnKWESx03PCmpZrKXirpdo0YFoObe5qeuMU7uLce79jVDmHo-c8MhrPDpw2rzzWlXZ-Kf0MULWCFKB7Kv-dU736CA9Qh9zEXVgmwBqpGpsOnC4RDivV-s0RwrFUZklEgf_u3mM64wOT9TElnOSoRlK0N_c__7LB7CKg6y3Zw6hPXub21_wwyxmz9O3I_-zfgBS8-QV |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3db9MwED9tAwl4GB8D0W2AQbxBtsSx5_qxaplaUapJC9LeLNuxt4mqmdZ2Ev89d0kaDYGQeIuSS2T5F9_9zr4PgI8nMYrSOo3ar5SJ4KVKLPLYpFSoMl1utWyKJE3VbNa_uNBnW_C5y4UJIdTBZ-GILuuz_LLya9oqO0Zbi76c3oYHUgieNtlanXul07odGdUcQ84o1CZFJtXHxfB8MqE4LnnEafeM57-Zoe0rCoKsu6v8oZJrO3P69P9G-Ax2Wz7JBs0P8By2wuIFPLlXZXAPisF8noyuL6k9CKNcLNegzqrICmrqdcnOf6CuY8hfWTEZjIZLVkcSMCSH7Kya_7y5QlvHRoHiz9sgr5fw_fRLMRwnbTOFxKOHsUoslRbD1SZt6tMyOCdlLnTGeSxVyJRKQx_JDVqqPPgTLxWXLkSfo3djs-iymL-CnUW1CK-BuZDbSEzLKi8i9_2gqGmx05bHvnCqB9lmbo1vK41Tw4u5qT2OVJsaD0N4mBaPHnzq3rlp6mz8U_oDQtYJUons8WBq6B4dpWfoZd5lPdgjgDqpFpseHG4QNu16XRokURzVmdA4-PfdY1xpdHxiF6FakwzNkECPc__vX34Hj8bFt6mZTmZfD-AxDrjdrDmEndXtOryBh_5udb28fVv_uL8AV5TnXA |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=All-Digital+Calibration+of+Timing+Skews+for+TIADCs+Using+the+Polyphase+Decomposition&rft.jtitle=IEEE+transactions+on+circuits+and+systems.+II%2C+Express+briefs&rft.au=Le+Duc%2C+Han&rft.au=Nguyen%2C+Duc+Minh&rft.au=Jabbour%2C+Chadi&rft.au=Graba%2C+Tarik&rft.date=2016-01-01&rft.pub=The+Institute+of+Electrical+and+Electronics+Engineers%2C+Inc.+%28IEEE%29&rft.issn=1549-7747&rft.eissn=1558-3791&rft.volume=63&rft.issue=1&rft.spage=99&rft_id=info:doi/10.1109%2FTCSII.2015.2483423&rft.externalDBID=NO_FULL_TEXT&rft.externalDocID=3905989971 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1549-7747&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1549-7747&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1549-7747&client=summon |