Two reliability-based iterative majority-logic decoding algorithms for LDPC codes

This paper presents two novel reliability-based iterative majority-logic decoding algorithms for LDPC codes. Both algorithms are binary message-passing algorithms and require only logical operations and integer additions. Consequently, they can be implemented with simple combinational logic circuits...

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Veröffentlicht in:	IEEE transactions on communications Jg. 57; H. 12; S. 3597 - 3606
Hauptverfasser:	Huang, Q, Kang, J, Zhang, L, Lin, S, Abdel-Ghaffar, K
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York, NY IEEE 01.12.2009 Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Algorithms Applied sciences binary message passing Coding, codes Combinational circuits Complexity Convergence Decoding Errors Exact sciences and technology Information, signal and communications theory Integers Iterative algorithms Iterative decoding Logic circuits majority-logic decoding Message passing Null space orthogonal check-sums Parity check codes Row-column constraint Signal and communications theory Sparse matrices Sum product algorithm Telecommunications and information theory Tradeoffs Performance evaluation Bit flipping Error estimation binary message passing Majority logic Row-column constraint Algorithm Iterative decoding Implementation Logic circuit Message passing Algorithm complexity Error correcting code Parity check codes majority-logic decoding orthogonal check-sums
ISSN:	0090-6778, 1558-0857
Online-Zugang:	Volltext
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