Xueqiang, W., Liyang, P., Dong, W., Chaohong, H., & Runde, Z. (2009). A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC nor Flash Memories. IEEE transactions on circuits and systems. II, Express briefs, 56(11), 865-869. https://doi.org/10.1109/TCSII.2009.2029144
Chicago-Zitierstil (17. Ausg.)Xueqiang, Wang, Pan Liyang, Wu Dong, Hu Chaohong, und Zhou Runde. "A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC nor Flash Memories." IEEE Transactions on Circuits and Systems. II, Express Briefs 56, no. 11 (2009): 865-869. https://doi.org/10.1109/TCSII.2009.2029144.
MLA-Zitierstil (9. Ausg.)Xueqiang, Wang, et al. "A High-Speed Two-Cell BCH Decoder for Error Correcting in MLC nor Flash Memories." IEEE Transactions on Circuits and Systems. II, Express Briefs, vol. 56, no. 11, 2009, pp. 865-869, https://doi.org/10.1109/TCSII.2009.2029144.