Design Space Exploration of Hard-Decision Viterbi Decoding: Algorithm and VLSI Implementation

Viterbi algorithm is widely used as a decoding technique for convolutional codes as well as a bit detection method in storage devices. The design space for VLSI implementation of Viterbi decoders is huge, involving choices of throughput, latency, area, and power. Even for a fixed set of parameters l...

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Vydáno v:	IEEE transactions on very large scale integration (VLSI) systems Ročník 18; číslo 5; s. 794 - 807
Hlavní autoři:	Habib, Irfan, Paker, Ozgun, Sawitzki, Sergei
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	New York, NY IEEE 01.05.2010 Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Témata:	Algorithm design and analysis Algorithms Applied sciences Circuit properties CMOS technology Convolutional codes Decoding Design engineering Design. Technologies. Operation analysis. Testing Electric, optical and optoelectronic circuits Electronic circuits Electronics Encoders Exact sciences and technology Integrated circuits Magnetic and optical mass memories Polynomials Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices Shift registers Signal convertors Space exploration Space technology Storage and reproduction of information survey Very large scale integration Viterbi algorithm Viterbi decoders Viterbi decoding VLSI design Memory devices VLSI circuit Convolutional code Coding circuit Integrated circuit design Storage system Decoding circuit VLSI design Algorithm Implementation Viterbi algorithm Coding Integrated circuit survey Viterbi decoding
ISSN:	1063-8210, 1557-9999
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Popis
Shrnutí:	Viterbi algorithm is widely used as a decoding technique for convolutional codes as well as a bit detection method in storage devices. The design space for VLSI implementation of Viterbi decoders is huge, involving choices of throughput, latency, area, and power. Even for a fixed set of parameters like constraint length, encoder polynomials and trace-back depth, the task of designing a Viterbi decoder is quite complex and requires significant effort. Sometimes, due to incomplete design space exploration or incorrect analysis, a suboptimal design is chosen. This work analyzes the design complexity by applying most of the known VLSI implementation techniques for hard-decision Viterbi decoding to a different set of code parameters. The conclusions are based on real designs for which actual synthesis and layouts were obtained. In authors' view, due to the depth covered, it is the most comprehensive analysis of the topic published so far.
Bibliografie:	ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 14 content type line 23
ISSN:	1063-8210 1557-9999
DOI:	10.1109/TVLSI.2009.2017024