Studer, C., Benkeser, C., Belfanti, S., & Huang, Q. (2011). Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE. IEEE journal of solid-state circuits, 46(1), 8-17. https://doi.org/10.1109/JSSC.2010.2075390
Citace podle Chicago (17th ed.)Studer, C., C. Benkeser, S. Belfanti, a Quiting Huang. "Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE." IEEE Journal of Solid-state Circuits 46, no. 1 (2011): 8-17. https://doi.org/10.1109/JSSC.2010.2075390.
Citace podle MLA (9th ed.)Studer, C., et al. "Design and Implementation of a Parallel Turbo-Decoder ASIC for 3GPP-LTE." IEEE Journal of Solid-state Circuits, vol. 46, no. 1, 2011, pp. 8-17, https://doi.org/10.1109/JSSC.2010.2075390.
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