Low-Power State-Parallel Relaxed Adaptive Viterbi Decoder

Although it possesses reduced computational complexity and great power saving potential, conventional adaptive Viterbi algorithm implementations contain a global best survivor path metric search operation that prevents it from being directly implemented in a high-throughput state-parallel decoder. T...

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Bibliographic Details
Published in:	IEEE transactions on circuits and systems. I, Regular papers Vol. 54; no. 5; pp. 1060 - 1068
Main Authors:	Sun, F, Zhang, T
Format:	Journal Article
Language:	English
Published:	New York IEEE 01.05.2007 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Adaptive algorithms Adaptive Viterbi algorithm Algorithm design and analysis Algorithms Circuits Computational complexity Convolutional codes Decoders Decoding Delay low power Searching Silicon Sun T -algorithm Throughput Very large scale integration very large-scale integration (VLSI) architecture Viterbi algorithm Viterbi decoders
ISSN:	1549-8328, 1558-0806
Online Access:	Get full text
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