Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs

In this paper, we propose a distributed routing algorithm for vertically partially connected regular 2D topologies of different shapes and sizes (e.g., 2D mesh, torus, ring). The topologies that are the target of this algorithm are of practical interest in the 3D integration of heterogeneous dies us...

Celý popis

Uložené v:

Podrobná bibliografia
Vydané v:	IEEE transactions on computers Ročník 62; číslo 3; s. 609 - 615
Hlavní autori:	Dubois, F., Sheibanyrad, A., Pétrot, F., Bahmani, M.
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.03.2013 The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Institute of Electrical and Electronics Engineers
Predmet:	Algorithms Blockage deadlock freedom Dies Elevators Engineering Sciences Integrated circuit interconnections Keywords-3D Integration Mathematical analysis Mathematical models Micro and nanotechnologies Microelectronics Network topology network-on-chip (NoC) Routing routing algorithm Studies System recovery Three dimensional Three dimensional displays Topology Two dimensional NOCS
ISSN:	0018-9340, 1557-9956
On-line prístup:	Získať plný text
Tagy:	Pridať tag Žiadne tagy, Buďte prvý, kto otaguje tento záznam!

Abstract	In this paper, we propose a distributed routing algorithm for vertically partially connected regular 2D topologies of different shapes and sizes (e.g., 2D mesh, torus, ring). The topologies that are the target of this algorithm are of practical interest in the 3D integration of heterogeneous dies using Through-Silicon-Vias (TSVs). Indeed, TSV-based 3D integration allows to envision the stacking of dies with different functions and technologies, using as an interconnect backbone a 3D-NoC. Intrinsically, 3D topologies have better performances, but yield and active area (and thus the cost) are function of the number of TSVs; therefore, the designs tend to use only a subset of available TSVs between two dies. The definition of blockage free and low implementation cost distributed deterministic routing on this kind of topology is thus of theoretical and practical interests. We formally prove that independently of the shape and dimensions of the planar topologies and of the number and placement of the TSVs, the proposed routing algorithm using two virtual channels in the plane is deadlock and livelock free. We also experimentally show that the performance of this algorithm is still acceptable when the number of vertical connections decreases.
AbstractList	In this paper, we propose a distributed routing algorithm for vertically partially connected regular 2D topologies of different shapes and sizes (e.g., 2D mesh, torus, ring). The topologies that are the target of this algorithm are of practical interest in the 3D integration of heterogeneous dies using Through-Silicon-Vias (TSVs). Indeed, TSV-based 3D integration allows to envision the stacking of dies with different functions and technologies, using as an interconnect backbone a 3D-NoC. Intrinsically, 3D topologies have better performances, but yield and active area (and thus the cost) are function of the number of TSVs; therefore, the designs tend to use only a subset of available TSVs between two dies. The definition of blockage free and low implementation cost distributed deterministic routing on this kind of topology is thus of theoretical and practical interests. We formally prove that independently of the shape and dimensions of the planar topologies and of the number and placement of the TSVs, the proposed routing algorithm using two virtual channels in the plane is deadlock and livelock free. We also experimentally show that the performance of this algorithm is still acceptable when the number of vertical connections decreases.
Author	Dubois, F. Pétrot, F. Bahmani, M. Sheibanyrad, A.
Author_xml	– sequence: 1 givenname: F. surname: Dubois fullname: Dubois, F. email: florentine.dubois@imag.fr organization: TIMA Lab., UJF, Grenoble, France – sequence: 2 givenname: A. surname: Sheibanyrad fullname: Sheibanyrad, A. email: abbas.sheibanyrad@imag.fr organization: TIMA Lab., UJF, Grenoble, France – sequence: 3 givenname: F. surname: Pétrot fullname: Pétrot, F. email: frederic.petrot@imag.fr organization: TIMA Lab., UJF, Grenoble, France – sequence: 4 givenname: M. surname: Bahmani fullname: Bahmani, M. email: maryam.bahmani@imag.fr organization: TIMA Lab., UJF, Grenoble, France
BackLink	https://hal.science/hal-01138285$$DView record in HAL
BookMark	eNp1kU1v1DAQhi1UJLalJ45cInEBoWz9kcQ2t1W2S5FWBVULV8txJl0Xb9zaTqX-exwW9VCJ04xmnnc0M-8pOhn9CAi9I3hJCJYXu3ZJMSFLyuQrtCB1zUsp6-YELTAmopSswm_QaYx3GOOGYrlA-0sHjzr5UG5siOlLsSrWoHvnze9yEwCKtY0p2G5K0Bc3fkp2vC1W7tYHm_aHYvCh-AUhWaOdeyp-6Jz-zVo_jmBmEVuX176Nb9HrQbsI5__iGfq5udy1V-X2-9dv7WpbmopUqewa2TQNaA6ik73gHPNacFwPuuuNob3hA-07XQ0GmOgpNiAYkUxioKwxnLIz9Ok4d6-dug_2oMOT8tqqq9VWzbX8HyaoqB9JZj8e2fvgHyaISR1sNOCcHsFPURFG6obLquIZ_fACvfNTGPMlilDBJBcE40x9PlIm-BgDDM8bEKxmh9SuVbNDKjuUafKCNjbpZP2YgrbuP5r3R40FgOfpTcbm7h9w5pxa
CODEN	ITCOB4
CitedBy_id	crossref_primary_10_1109_TCPMT_2018_2842102 crossref_primary_10_1016_j_vlsi_2025_102534 crossref_primary_10_1109_TC_2016_2532871 crossref_primary_10_1109_TC_2018_2801298 crossref_primary_10_1109_TC_2023_3248260 crossref_primary_10_1016_j_mejo_2014_05_003 crossref_primary_10_1016_j_comnet_2019_03_014 crossref_primary_10_1088_1755_1315_234_1_012048 crossref_primary_10_3390_electronics12234867 crossref_primary_10_1145_2968446 crossref_primary_10_1109_TCAD_2024_3371255 crossref_primary_10_1016_j_micpro_2016_04_002 crossref_primary_10_1016_j_compeleceng_2018_02_019 crossref_primary_10_1016_j_sysarc_2016_04_011 crossref_primary_10_1088_1742_6596_2571_1_012032 crossref_primary_10_1049_iet_com_2019_0269 crossref_primary_10_1109_ACCESS_2019_2942129 crossref_primary_10_1145_3267419_3267423 crossref_primary_10_1016_j_mejo_2021_105231 crossref_primary_10_1109_TC_2018_2822269 crossref_primary_10_1109_TVLSI_2015_2418216 crossref_primary_10_1109_TVLSI_2014_2379263 crossref_primary_10_1109_TCAD_2019_2917846 crossref_primary_10_1145_2700236 crossref_primary_10_1016_j_nancom_2020_100334 crossref_primary_10_1109_ACCESS_2019_2900477 crossref_primary_10_1145_3394919 crossref_primary_10_1109_TCAD_2020_3038338 crossref_primary_10_1016_j_micpro_2018_01_005 crossref_primary_10_1145_3140659_3080253 crossref_primary_10_1109_TC_2015_2401016 crossref_primary_10_1145_2751560 crossref_primary_10_1016_j_sysarc_2025_103429 crossref_primary_10_1016_j_vlsi_2025_102529 crossref_primary_10_1016_j_vlsi_2014_12_006 crossref_primary_10_1145_3762650 crossref_primary_10_1109_TETC_2017_2776909 crossref_primary_10_1007_s12652_022_04345_3 crossref_primary_10_1109_TVLSI_2024_3500575 crossref_primary_10_1145_3708543 crossref_primary_10_1109_TCAD_2017_2768415 crossref_primary_10_1145_3241050 crossref_primary_10_1080_17445760_2013_866236 crossref_primary_10_1109_TNANO_2019_2931271 crossref_primary_10_1016_j_micpro_2019_05_002 crossref_primary_10_1155_2017_9427678 crossref_primary_10_1109_TCAD_2014_2323219
Cites_doi	10.1145/146628.140384 10.1109/TVLSI.2007.893649 10.1109/TC.2008.142 10.1109/12.4611 10.1109/SUPERC.1988.44670 10.1109/TPDS.2006.12 10.1109/NOCS.2008.4492728 10.1109/MDT.2005.136 10.1109/DATE.2009.5090627 10.1109/TC.2008.211 10.1109/NOCS.2009.5071459 10.1109/49.105178 10.1016/S0167-8191(97)00093-8 10.1109/71.877816 10.1145/200836.200856 10.1109/FTCS.1993.627327 10.1007/978-1-4419-7618-5 10.1109/ISCA.2006.18 10.1109/TCAD.2008.2010691 10.1109/DFT.2007.14 10.1109/SOCC.2009.5335673 10.1109/TC.2006.46 10.1016/j.sysarc.2005.09.003 10.1109/TC.1987.1676939 10.1109/12.241597 10.1142/s0129626403001616 10.1109/12.392844 10.1109/IPDPS.2006.1639341 10.1109/NOCS.2010.12 10.1109/PDP.2007.28
ContentType	Journal Article
Copyright	Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Mar 2013 Distributed under a Creative Commons Attribution 4.0 International License
Copyright_xml	– notice: Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Mar 2013 – notice: Distributed under a Creative Commons Attribution 4.0 International License
DBID	97E RIA RIE AAYXX CITATION 7SC 7SP 8FD JQ2 L7M L~C L~D F28 FR3 1XC
DOI	10.1109/TC.2011.239
DatabaseName	IEEE Xplore (IEEE) IEEE All-Society Periodicals Package (ASPP) 1998–Present IEEE Electronic Library (IEL) CrossRef Computer and Information Systems Abstracts Electronics & Communications Abstracts Technology Research Database ProQuest Computer Science Collection Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Academic Computer and Information Systems Abstracts Professional ANTE: Abstracts in New Technology & Engineering Engineering Research Database Hyper Article en Ligne (HAL)
DatabaseTitle	CrossRef Technology Research Database Computer and Information Systems Abstracts – Academic Electronics & Communications Abstracts ProQuest Computer Science Collection Computer and Information Systems Abstracts Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Professional Engineering Research Database ANTE: Abstracts in New Technology & Engineering
DatabaseTitleList	Technology Research Database Technology Research Database
Database_xml	– sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher
DeliveryMethod	fulltext_linktorsrc
Discipline	Engineering Computer Science
EISSN	1557-9956
EndPage	615
ExternalDocumentID	oai:HAL:hal-01138285v1 2882752571 10_1109_TC_2011_239 6109239
Genre	orig-research
GroupedDBID	--Z -DZ -~X .55 .DC 0R~ 29I 3EH 3O- 4.4 5GY 5VS 6IK 85S 97E AAJGR AARMG AASAJ AAWTH ABAZT ABFSI ABQJQ ABVLG ACGFO ACIWK ACNCT AENEX AETEA AETIX AGQYO AGSQL AHBIQ AI. AIBXA AKJIK AKQYR ALLEH ALMA_UNASSIGNED_HOLDINGS ASUFR ATWAV BEFXN BFFAM BGNUA BKEBE BPEOZ CS3 DU5 E.L EBS EJD HZ~ H~9 IAAWW IBMZZ ICLAB IEDLZ IFIPE IFJZH IPLJI JAVBF LAI M43 MS~ MVM O9- OCL P2P PQQKQ RIA RIE RNI RNS RXW RZB TAE TN5 TWZ UHB UKR UPT VH1 X7M XJT XOL XZL YXB YYQ YZZ ZCG AAYXX ABUFD CITATION 7SC 7SP 8FD JQ2 L7M L~C L~D F28 FR3 1XC
ID	FETCH-LOGICAL-c414t-b69666ea7e8b9d8770758705fabdcc2dc7f2dba4fce38d20ce8319390e236c723
IEDL.DBID	RIE
ISICitedReferencesCount	81
ISICitedReferencesURI	http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000314391600016&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
ISSN	0018-9340
IngestDate	Tue Oct 14 06:55:55 EDT 2025 Sun Sep 28 03:14:13 EDT 2025 Sun Nov 30 04:40:08 EST 2025 Sat Nov 29 08:08:39 EST 2025 Tue Nov 18 22:43:32 EST 2025 Wed Aug 27 02:49:04 EDT 2025
IsPeerReviewed	true
IsScholarly	true
Issue	3
Keywords	NOCS
Language	English
License	https://ieeexplore.ieee.org/Xplorehelp/downloads/license-information/IEEE.html Distributed under a Creative Commons Attribution 4.0 International License: http://creativecommons.org/licenses/by/4.0
LinkModel	DirectLink
MergedId	FETCHMERGED-LOGICAL-c414t-b69666ea7e8b9d8770758705fabdcc2dc7f2dba4fce38d20ce8319390e236c723
Notes	ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 ObjectType-Article-2 ObjectType-Feature-1 content type line 23
ORCID	0000-0003-0624-7373
PQID	1283978100
PQPubID	85452
PageCount	7
ParticipantIDs	proquest_miscellaneous_1315679447 ieee_primary_6109239 proquest_journals_1283978100 crossref_primary_10_1109_TC_2011_239 hal_primary_oai_HAL_hal_01138285v1 crossref_citationtrail_10_1109_TC_2011_239
PublicationCentury	2000
PublicationDate	2013-03-01
PublicationDateYYYYMMDD	2013-03-01
PublicationDate_xml	– month: 03 year: 2013 text: 2013-03-01 day: 01
PublicationDecade	2010
PublicationPlace	New York
PublicationPlace_xml	– name: New York
PublicationTitle	IEEE transactions on computers
PublicationTitleAbbrev	TC
PublicationYear	2013
Publisher	IEEE The Institute of Electrical and Electronics Engineers, Inc. (IEEE) Institute of Electrical and Electronics Engineers
Publisher_xml	– name: IEEE – name: The Institute of Electrical and Electronics Engineers, Inc. (IEEE) – name: Institute of Electrical and Electronics Engineers
References	ref13 ref12 ref15 ref14 ref31 ref30 ref11 ref10 ref2 ref1 ref17 ref16 ref19 ref18 ref24 ref23 ref26 ref25 ref20 ref22 ref21 ref28 ref27 ref29 ref8 ref9 ref4 ref3 ref6 Bartzas (ref7) ref5
References_xml	– ident: ref17 doi: 10.1145/146628.140384 – ident: ref3 doi: 10.1109/TVLSI.2007.893649 – ident: ref4 doi: 10.1109/TC.2008.142 – ident: ref5 doi: 10.1109/12.4611 – ident: ref12 doi: 10.1109/SUPERC.1988.44670 – ident: ref15 doi: 10.1109/TPDS.2006.12 – ident: ref21 doi: 10.1109/NOCS.2008.4492728 – ident: ref1 doi: 10.1109/MDT.2005.136 – ident: ref16 doi: 10.1109/DATE.2009.5090627 – ident: ref28 doi: 10.1109/TC.2008.211 – ident: ref30 doi: 10.1109/NOCS.2009.5071459 – ident: ref9 doi: 10.1109/49.105178 – ident: ref20 doi: 10.1016/S0167-8191(97)00093-8 – ident: ref13 doi: 10.1109/71.877816 – ident: ref27 doi: 10.1145/200836.200856 – ident: ref18 doi: 10.1109/FTCS.1993.627327 – ident: ref2 doi: 10.1007/978-1-4419-7618-5 – ident: ref31 doi: 10.1109/ISCA.2006.18 – ident: ref8 doi: 10.1109/TCAD.2008.2010691 – ident: ref14 doi: 10.1109/DFT.2007.14 – ident: ref23 doi: 10.1109/SOCC.2009.5335673 – ident: ref26 doi: 10.1109/TC.2006.46 – ident: ref10 doi: 10.1016/j.sysarc.2005.09.003 – volume-title: Proc. Workshop Application Specific Processors (WASP) ident: ref7 article-title: Exploration of Alternative Topologies for Application-Specific 3d Networks-on-Chip – ident: ref29 doi: 10.1109/TC.1987.1676939 – ident: ref6 doi: 10.1109/12.241597 – ident: ref11 doi: 10.1142/s0129626403001616 – ident: ref19 doi: 10.1109/12.392844 – ident: ref24 doi: 10.1109/IPDPS.2006.1639341 – ident: ref22 doi: 10.1109/NOCS.2010.12 – ident: ref25 doi: 10.1109/PDP.2007.28
SSID	ssj0006209
Score	2.3826084
Snippet	In this paper, we propose a distributed routing algorithm for vertically partially connected regular 2D topologies of different shapes and sizes (e.g., 2D...
SourceID	hal proquest crossref ieee
SourceType	Open Access Repository Aggregation Database Enrichment Source Index Database Publisher
StartPage	609
SubjectTerms	Algorithms Blockage deadlock freedom Dies Elevators Engineering Sciences Integrated circuit interconnections Keywords-3D Integration Mathematical analysis Mathematical models Micro and nanotechnologies Microelectronics Network topology network-on-chip (NoC) Routing routing algorithm Studies System recovery Three dimensional Three dimensional displays Topology Two dimensional
Title	Elevator-First: A Deadlock-Free Distributed Routing Algorithm for Vertically Partially Connected 3D-NoCs
URI	https://ieeexplore.ieee.org/document/6109239 https://www.proquest.com/docview/1283978100 https://www.proquest.com/docview/1315679447 https://hal.science/hal-01138285
Volume	62
WOSCitedRecordID	wos000314391600016&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText	1
inHoldings	1
isFullTextHit
isPrint
journalDatabaseRights	– providerCode: PRVIEE databaseName: IEEE Electronic Library (IEL) customDbUrl: eissn: 1557-9956 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0006209 issn: 0018-9340 databaseCode: RIE dateStart: 19680101 isFulltext: true titleUrlDefault: https://ieeexplore.ieee.org/ providerName: IEEE
link	http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3Pb9MwFH5aJw5w2GADkTGQQTshwhw7jRNuVbtqB1TtUNBuUWy_0IrQov6S-O95z02jSezCzUqeoyifn59f_Px9AFeySigO9JFWblLHqTc2tt7auEhz5TNXV5j7IDZhJpP8_r64O4JP3VkYRAzFZ_iZm2Ev3y_dln-VXTM1uNJFD3rGZPuzWt2smx3KORJyYJ3K9iwe9bieDvdUnYoVwR9En96Max-DqMo_M3EIL-PT_3ux53DSLiPFYI_7CzjCxRmcHiQaROuxZ_DsAd_gOcxuGtxxlh2P57Tq-yIGYkQYUzz7GY9XiGLENLqsgIVecK0Q9RKD5sdyNd_Mfgla34rvoQ67apo_4o5HXWiFahnHnfQoniyH65fwbXwzHd7GrdRC7NIk3cQ2o7Qnw8pgbgufE3CURxjZryvrnVPemVp5W6W1Q517JR3m5Lu6kKh05ozSr-B4sVzgaxBFX6XOVhZ94tJMaquQxoPxtUko-7Emgo8HCErX8pCzHEZThnxEFuV0WDJeJX3RCK464997-o3HzT4Qlp0FU2bfDr6WfI0sNLP07ZIIzhm5zqoFLYLLA_Rl67_rkqK2ZjYwKSN4390mz-PtlGqByy3ZaMp9aTpLzcXjT34DT1UQz-CKtUs43qy2-BaeuN1mvl69C8P3Lx0Y7Zw
linkProvider	IEEE
linkToHtml	http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3fb9MwED5tAwl4YLCBCAwwaE-IbI7txglvVbuqiFLtoaC9RbF9oRWhRf0l8d9zdtNoEnvhzUrOUZTP5_PF5-8DOOdlQnGgg7Ry4zJWTpvYOGPiXGXCpbYqMXNBbEKPx9nNTX59AB_bszCIGIrP8MI3w16-W9iN_1V26anBhcwP4V5HKcF3p7XaeTfdF3Qk5MJS8eY0HvW5nPR2ZJ3Ca4Lfij-HU1_9GGRV_pmLQ4AZHP_fqz2Bx81CknV3yD-FA5yfwPFepIE1PnsCj24xDp7C9KrGrc-z48GM1n2fWJf1CWWKaD_jwRKR9T2RrtfAQsd8tRD1Yt36x2I5W09_MVrhsu-hErus6z_s2o-70Ar1MtZ3kv14vOitnsG3wdWkN4wbsYXYqkStY5NS4pNiqTEzucsIOsokNO9UpXHWCmd1JZwpVWVRZk5wixl5r8w5CplaLeRzOJov5vgCWN4RyprSoEusSrk0AmlEaFfphPIfoyP4sIegsA0TuRfEqIuQkfC8mPQKj1dBXzSC89b4946A426z94Rla-FJs4fdUeGvkYX0PH3bJIJTj1xr1YAWwdke-qLx4FVBcVt6PjDOI3jX3ibf8xsq5RwXG7KRlP3ShKb0y7uf_BYeDCdfR8Xo8_jLK3gogpSGr187g6P1coOv4b7drmer5ZswlP8Cm53w4w
openUrl	ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=Elevator-First%3A+A+Deadlock-Free+Distributed+Routing+Algorithm+for+Vertically+Partially+Connected+3D-NoCs&rft.jtitle=IEEE+transactions+on+computers&rft.au=Dubois%2C+Florentine&rft.au=Sheibanyrad%2C+Abbas&rft.au=P%C3%A9trot%2C+Fr%C3%A9d%C3%A9ric&rft.au=Bahmani%2C+Maryam&rft.date=2013-03-01&rft.pub=The+Institute+of+Electrical+and+Electronics+Engineers%2C+Inc.+%28IEEE%29&rft.issn=0018-9340&rft.eissn=1557-9956&rft.volume=62&rft.issue=3&rft.spage=609&rft_id=info:doi/10.1109%2FTC.2011.239&rft.externalDBID=NO_FULL_TEXT&rft.externalDocID=2882752571
thumbnail_l	http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0018-9340&client=summon
thumbnail_m	http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0018-9340&client=summon
thumbnail_s	http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0018-9340&client=summon