LDPC product coding scheme with extrinsic information for bit patterned media recoding
Since the density limit of the current perpendicular magnetic storage system will soon be reached, bit patterned media recording (BPMR) is a promising candidate for the next generation storage system to achieve an areal density beyond 1 Tb/in2. Each recording bit is stored in a fabricated magnetic i...
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| Vydané v: | AIP advances Ročník 7; číslo 5; s. 056513 - 056513-4 |
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| Hlavní autori: | , |
| Médium: | Journal Article |
| Jazyk: | English |
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AIP Publishing LLC
01.05.2017
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| ISSN: | 2158-3226, 2158-3226 |
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| Abstract | Since the density limit of the current perpendicular magnetic storage system will soon be reached, bit patterned media recording (BPMR) is a promising candidate for the next generation storage system to achieve an areal density beyond 1 Tb/in2. Each recording bit is stored in a fabricated magnetic island and the space between the magnetic islands is nonmagnetic in BPMR. To approach recording densities of 1 Tb/in2, the spacing of the magnetic islands must be less than 25 nm. Consequently, severe inter-symbol interference (ISI) and inter-track interference (ITI) occur. ITI and ISI degrade the performance of BPMR. In this paper, we propose a low-density parity check (LDPC) product coding scheme that exploits extrinsic information for BPMR. This scheme shows an improved bit error rate performance compared to that in which one LDPC code is used. |
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| AbstractList | Since the density limit of the current perpendicular magnetic storage system will soon be reached, bit patterned media recording (BPMR) is a promising candidate for the next generation storage system to achieve an areal density beyond 1 Tb/in2. Each recording bit is stored in a fabricated magnetic island and the space between the magnetic islands is nonmagnetic in BPMR. To approach recording densities of 1 Tb/in2, the spacing of the magnetic islands must be less than 25 nm. Consequently, severe inter-symbol interference (ISI) and inter-track interference (ITI) occur. ITI and ISI degrade the performance of BPMR. In this paper, we propose a low-density parity check (LDPC) product coding scheme that exploits extrinsic information for BPMR. This scheme shows an improved bit error rate performance compared to that in which one LDPC code is used. |
| Author | Jeong, Seongkwon Lee, Jaejin |
| Author_xml | – sequence: 1 givenname: Seongkwon surname: Jeong fullname: Jeong, Seongkwon organization: Soongsil University, Seoul 06978, Korea – sequence: 2 givenname: Jaejin surname: Lee fullname: Lee, Jaejin email: zlee@ssu.ac.kr organization: Soongsil University, Seoul 06978, Korea |
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| CitedBy_id | crossref_primary_10_1109_TMAG_2018_2833099 crossref_primary_10_1109_TMAG_2017_2695654 |
| Cites_doi | 10.1109/tmag.2005.854780 10.1109/tce.2005.1561844 10.1109/tmag.2005.856586 10.1109/tmag.2014.2304556 10.1109/20.824420 10.1109/tmag.2010.2100371 10.1109/tmag.2007.893479 10.1109/20.560144 10.1109/20.334044 |
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