On the Capacity of Bufferless Networks-on-Chip

Networks-on-Chip (NoCs) form an emerging paradigm for communications within chips. In particular, bufferless NoCs require significantly less area and power consumption, but also pose novel major scheduling problems to achieve full capacity. In this paper, we provide first insights on the capacity of...

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Bibliographic Details
Published in:	IEEE transactions on parallel and distributed systems Vol. 26; no. 2; pp. 492 - 506
Main Authors:	Shpiner, Alexander, Kantor, Erez, Pu Li, Cidon, Israel, Keslassy, Isaac
Format:	Journal Article
Language:	English
Published:	New York IEEE 01.02.2015 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Algorithm design and analysis Algorithms Buffers Greedy algorithms Network topology Networks Optimal scheduling Routing Schedules Scheduling Topology Traffic engineering Traffic flow Networks-on-Chip collective communication all-to-all personalized exchange interprocessor communication scheduling bufferless network complete-exchange
ISSN:	1045-9219, 1558-2183
Online Access:	Get full text
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