Shoukry, M., Gebali, F., & Agathoklis, P. (2019). Decimator systolic arrays design space exploration for multirate signal processing applications. IET circuits, devices & systems, 13(8), 1232-1240. https://doi.org/10.1049/iet-cds.2019.0077
Chicago-Zitierstil (17. Ausg.)Shoukry, Mohammed, Fayez Gebali, und Panajotis Agathoklis. "Decimator Systolic Arrays Design Space Exploration for Multirate Signal Processing Applications." IET Circuits, Devices & Systems 13, no. 8 (2019): 1232-1240. https://doi.org/10.1049/iet-cds.2019.0077.
MLA-Zitierstil (9. Ausg.)Shoukry, Mohammed, et al. "Decimator Systolic Arrays Design Space Exploration for Multirate Signal Processing Applications." IET Circuits, Devices & Systems, vol. 13, no. 8, 2019, pp. 1232-1240, https://doi.org/10.1049/iet-cds.2019.0077.