Bulk‐Switching Memristor‐Based Compute‐In‐Memory Module for Deep Neural Network Training - Wu, Yuting; Wang, Qiwen; Wang, Ziyu; Wang, Xinxin; Ayyagari, Buvna; Krishnan, Siddarth; Chudzik, Michael; Lu, Wei D. (Advanced materials (Weinheim), 2023)
The constant drive to achieve higher performance in deep neural networks (DNNs) has led to the proliferation of very large models. Model training, however, requires intensive computation time and energy. Memristor‐based compute‐in‐memory (CIM) modules can perform vector‐matrix multiplication (VMM) in place and in parallel, and have shown great promises in DNN inference applications. However, CIM‐based model training faces challenges due to non‐linear weight updates, device variations, and low‐precision. In this work, a mixed‐precision training scheme is experimentally implemented to mitigate these effects using a bulk‐switching memristor‐based CIM module. Low‐precision CIM modules are used to accelerate the expensive VMM operations, with high‐precision weight updates accumulated in digital units. Memristor devices are only changed when the accumulated weight update value exceeds a pre‐defined threshold. The proposed scheme is implemented with a system‐onchip of fully integrated analog CIM modules and digital sub‐systems, showing fast convergence of LeNet training to 97.73%. The efficacy of training larger models is evaluated using realistic hardware parameters and verifies that CIM modules can enable efficient mix‐precision DNN training with accuracy comparable to full‐precision software‐trained models. Additionally, models trained on chip are inherently robust to hardware variations, allowing direct mapping to CIM inference chips without additional re‐training. A compute‐in‐memory module integrated with bulk‐switching memristor arrays is demonstrated. A hardware–software co‐designed system is constructed to accelerate the neural network training and relax stringent requirements for device precision and endurance. The on‐chip trained networks are able to reach software‐comparable accuracies and exhibit robustness to weight perturbation when transferred to a new chip.