A Low Hardware Consumption Elliptic Curve Cryptographic Architecture over GF(p) in Embedded Application

In this paper, a low hardware consumption design of elliptic curve cryptography (ECC) over GF(p) in embedded applications is proposed. The adder-based architecture is explored to reduce the hardware consumption of performing scalar multiplication (SM). The Interleaved Modular Multiplication Algorith...

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Veröffentlicht in:	Electronics (Basel) Jg. 7; H. 7; S. 104
Hauptverfasser:	Hu, Xianghong, Zheng, Xin, Zhang, Shengshi, Cai, Shuting, Xiong, Xiaoming
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	Basel MDPI AG 03.07.2018
Schlagworte:	Addition & subtraction Algorithms CMOS Computer architecture Consumption Cryptography Data storage Design optimization Digital signatures Elliptic functions Embedded systems Gate counting Hardware International conferences Multiplication Multiplication & division Synthesis United States > US China Germany
ISSN:	2079-9292, 2079-9292
Online-Zugang:	Volltext
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