Partial Least Squares Identification of Multi Look-Up Table Digital Predistorters for Concurrent Dual-Band Envelope Tracking Power Amplifiers

This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and c...

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Vydané v:	IEEE transactions on microwave theory and techniques Ročník 66; číslo 12; s. 5143 - 5150
Hlavní autori:	Pham, Quynh Anh, Lopez-Bueno, David, Wang, Teng, Montoro, Gabriel, Gilabert, Pere L.
Médium:	Journal Article Publikácia
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.12.2018 The Institute of Electrical and Electronics Engineers, Inc. (IEEE) IEEE Microwave Theory and Techniques Society
Predmet:	Coefficients Complexity Computational modeling Data structures (Computer science) Digital predistortion (DPD) Distortion Distributed memory Enginyeria de la telecomunicació envelope tracking (ET) Estructures de dades (Informàtica) Feedback Least squares Linearity look-up tables (LUTs) Matching pursuit algorithms Matrix converters Orthogonality Parameter identification partial least squares (PLS) power amplifier (PA) Power amplifiers Principal component analysis principal component analysis (PCA) Regularization Table lookup Telemàtica i xarxes d'ordinadors Tracking Àrees temàtiques de la UPC
ISSN:	0018-9480, 1557-9670
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Abstract	This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and compensates for the distortion arising in concurrent dual-band envelope tracking power amplifiers. On the one hand, a new variant of the orthogonal matching pursuit algorithm is proposed to properly select only the best LUTs of the DPD function in the forward path, and thus reduce the number of required coefficients. On the other hand, the PLS regression method is proposed to address both the regularization problem of the coefficient estimation and, at the same time, reducing the number of coefficients to be estimated in the DPD feedback identification path. Moreover, by exploiting the orthogonality of the PLS transformed matrix, the computational complexity of the parameters' identification can be significantly simplified. Experimental results will prove how it is possible to reduce the DPD complexity (i.e., the number of coefficients) in both the forward and feedback paths while meeting the targeted linearity levels.
AbstractList	©208 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and compensates for the distortion arising in concurrent dual-band envelope tracking power amplifiers. On the one hand, a new variant of the orthogonal matching pursuit algorithm is proposed to properly select only the best LUTs of the DPD function in the forward path, and thus reduce the number of required coefficients. On the other hand, the PLS regression method is proposed to address both the regularization problem of the coefficient estimation and, at the same time, reducing the number of coefficients to be estimated in the DPD feedback identification path. Moreover, by exploiting the orthogonality of the PLS transformed matrix, the computational complexity of the parameters' identification can be significantly simplified. Experimental results will prove how it is possible to reduce the DPD complexity (i.e., the number of coefficients) in both the forward and feedback paths while meeting the targeted linearity levels. Peer Reviewed This paper presents a technique to estimate the coefficients of a multiple-look-up table (LUT) digital predistortion (DPD) architecture based on the partial least-squares (PLS) regression method. The proposed 3-D distributed memory LUT architecture is suitable for efficient FPGA implementation and compensates for the distortion arising in concurrent dual-band envelope tracking power amplifiers. On the one hand, a new variant of the orthogonal matching pursuit algorithm is proposed to properly select only the best LUTs of the DPD function in the forward path, and thus reduce the number of required coefficients. On the other hand, the PLS regression method is proposed to address both the regularization problem of the coefficient estimation and, at the same time, reducing the number of coefficients to be estimated in the DPD feedback identification path. Moreover, by exploiting the orthogonality of the PLS transformed matrix, the computational complexity of the parameters' identification can be significantly simplified. Experimental results will prove how it is possible to reduce the DPD complexity (i.e., the number of coefficients) in both the forward and feedback paths while meeting the targeted linearity levels.
Author	Lopez-Bueno, David Pham, Quynh Anh Gilabert, Pere L. Montoro, Gabriel Wang, Teng
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SubjectTerms	Coefficients Complexity Computational modeling Data structures (Computer science) Digital predistortion (DPD) Distortion Distributed memory Enginyeria de la telecomunicació envelope tracking (ET) Estructures de dades (Informàtica) Feedback Least squares Linearity look-up tables (LUTs) Matching pursuit algorithms Matrix converters Orthogonality Parameter identification partial least squares (PLS) power amplifier (PA) Power amplifiers Principal component analysis principal component analysis (PCA) Regularization Table lookup Telemàtica i xarxes d'ordinadors Tracking Àrees temàtiques de la UPC
Title	Partial Least Squares Identification of Multi Look-Up Table Digital Predistorters for Concurrent Dual-Band Envelope Tracking Power Amplifiers
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