Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture

We propose a network-on-chip (NoC)-based whole system design, whose communication architecture is compatible with the advanced microcontroller bus architecture advanced extensible interface 4 (AXI4) protocol and supports high-performance multiple quality-of-service (QoS) schemes. In our system, the...

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Vydané v:IEEE transactions on computer-aided design of integrated circuits and systems Ročník 41; číslo 5; s. 1523 - 1536
Hlavní autori: Wang, Boqian, Lu, Zhonghai
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: New York IEEE 01.05.2022
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:
Advanced extensible interface 4 (AXI4)
Communication architectures
Communications systems
Communications traffic
Computer architecture
Converters
Format
Inheritance mechanisms
Integrated circuit design
Integrated circuit interconnections
Internet protocols
Microcontrollers
Multiple quality
Network architecture
Network latency
Network-on-chip
network-on-chip (NoC)
Network-on-chip architectures
NoC architectures
Packet latencies
Packets (communication)
Proposed architectures
Protocols
Provisioning
Quality of service
quality of service (QoS)
Quality of service architectures
Regulation
Routing
Servers
System on chip
system-on-chip (SoC)
Systems design
Time division multiplexing
ISSN:0278-0070, 1937-4151, 1937-4151
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Popis
Shrnutí:We propose a network-on-chip (NoC)-based whole system design, whose communication architecture is compatible with the advanced microcontroller bus architecture advanced extensible interface 4 (AXI4) protocol and supports high-performance multiple quality-of-service (QoS) schemes. In our system, the network interface (NI) between the NoC and the master/slave node is proposed to make the NoC architecture independent from the AXI4 protocol via message format conversion between the AXI4 signal format and the packet format, offering high flexibility to the NoC design. Besides, a QoS inheritance mechanism is applied in the slave-side NI to support QoS during packets' round-trip transfer in the NoC. The NoC system contains time-division multiplexing (TDM) and virtual channel (VC) subnetworks to apply multiple QoS schemes to AXI4 signals with different QoS tags, and the NI is responsible for signals distribution between two subnetworks. Besides, a traffic converter is proposed in each NI to balance the traffic between the two subnetworks when necessary. The experimental results show that our proposed architecture ensures a high-throughput and low-latency NoC system. By applying the traffic converter, the packet latency can be improved.
Bibliografia:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:0278-0070
1937-4151
1937-4151
DOI:10.1109/TCAD.2021.3091410