Low complexity bit-parallel multipliers for a class of finite fields

New implementations of bit-parallel multipliers for a class of finite fields are proposed. The class of finite fields is constructed with irreducible AOPs (all one polynomials) and ESPs (equally spaced polynomials). The size and time complexities of our proposed multipliers are lower than or equal t...

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Veröffentlicht in:IEEE transactions on computers Jg. 47; H. 8; S. 883 - 887
Hauptverfasser: Huapeng Wu, Hasan, M.A.
Format: Journal Article
Sprache:Englisch
Veröffentlicht: New York, NY IEEE 01.08.1998
Institute of Electrical and Electronics Engineers
Schlagworte:
Applied sciences
Cryptography
Design. Technologies. Operation analysis. Testing
Electronics
Electrostatic precipitators
Exact sciences and technology
Galois fields
Integrated circuits
Message-oriented middleware
Polynomials
Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices
Integrated circuits
Multiplier
Finite field
Implementation
ISSN:0018-9340
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Zusammenfassung:New implementations of bit-parallel multipliers for a class of finite fields are proposed. The class of finite fields is constructed with irreducible AOPs (all one polynomials) and ESPs (equally spaced polynomials). The size and time complexities of our proposed multipliers are lower than or equal to those of the previously proposed multipliers of the same class.
Bibliographie:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9340
DOI:10.1109/12.707588