Comparative study of LDPC coding schemes and FPGA implementation for inter-vehicle communications

A novel comparative study of different low-density parity-check (LDPC) coding algorithms and implementation issues through field-programmable gate arrays (FPGAs) technology for wireless vehicular applications is presented. A key development in LDPC codes is the iterative decoding algorithm which use...

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Bibliographic Details
Published in:Electronics letters Vol. 51; no. 16; pp. 1255 - 1257
Main Authors: Kiokes, G, Zountouridou, E
Format: Journal Article
Language:English
Published: The Institution of Engineering and Technology 06.08.2015
Subjects:
Algorithms
belief propagation algorithm
Channels
Coding
Decoding
Error correcting codes
Field programmable gate arrays
FPGA implementation
Information and communications
inter‐vehicle communications
iterative decoding
iterative decoding algorithm
LDPC coding schemes
low‐density parity‐check coding algorithm
Messages
Modulation
parity check codes
phase shift keying
phase‐shift keying modulation scheme
vehicular channel model
LDPC coding schemes
iterative decoding algorithm
belief propagation algorithm
phase-shift keying modulation scheme
field programmable gate arrays
parity check codes
field-programmable gate arrays
vehicular channel model
low-density parity-check coding algorithm
iterative decoding
phase shift keying
FPGA implementation
inter-vehicle communications
ISSN:0013-5194, 1350-911X, 1350-911X
Online Access:Get full text
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Summary:A novel comparative study of different low-density parity-check (LDPC) coding algorithms and implementation issues through field-programmable gate arrays (FPGAs) technology for wireless vehicular applications is presented. A key development in LDPC codes is the iterative decoding algorithm which uses the belief propagation algorithm. A comprehensive investigation of the performance of different coding schemes was carried out. Four different decoding techniques were tested by computer-based simulations of messages modulated under the binary phase-shift keying modulation scheme and transmitted through a vehicular channel model. Finally, the best performance ratio against complexity algorithm was chosen to be implemented on a Xilinx FPGA platform.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
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content type line 23
ISSN:0013-5194
1350-911X
1350-911X
DOI:10.1049/el.2015.0838