An Iterative Algorithm for Hardware-Software Partitioning, Hardware Design Space Exploration and Scheduling

The paper proposes a novel heuristic technique for integrated hardware-software partitioning, hardware design space exploration and scheduling. The technique maps an application specified as a task graph on a heterogeneous architecture with an objective to minimize the latency of the task graph subj...

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Bibliographic Details
Published in:Design automation for embedded systems Vol. 5; no. 3-4; pp. 281 - 293
Main Authors: Chatha, Karam S., Vemuri, Ranga
Format: Journal Article
Language:English
Published: 01.08.2000
ISSN:0929-5585, 1572-8080
Online Access:Get full text
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