Securing the IoT ecosystem: ASIC-based hardware realization of Ascon lightweight cipher

The Internet of Things (IoT) nodes consist of sensors that collect environmental data and then perform data exchange with surrounding nodes and gateways. Cybersecurity attacks pose a threat to the data security that is being transmitted in any IoT network. Cryptographic primitives are widely adopted...

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Vydáno v:International journal of information security Ročník 23; číslo 6; s. 3653 - 3664
Hlavní autoři: Khan, Safiullah, Inayat, Kashif, Muslim, Fahad Bin, Shah, Yasir Ali, Atif Ur Rehman, Muhammad, Khalid, Ayesha, Imran, Malik, Abdusalomov, Akmalbek
Médium: Journal Article
Jazyk:angličtina
Vydáno: Berlin/Heidelberg Springer Berlin Heidelberg 01.12.2024
Springer Nature B.V
Témata:
Algorithms
Architecture
Coding and Information Theory
Communications Engineering
Computation
Computer architecture
Computer Communication Networks
Computer engineering
Computer Science
Cryptography
Cryptology
Cybersecurity
Data
Data encryption
Data exchange
Design
Design factors
Design standards
Ecosystems
Encryption
Energy consumption
Field programmable gate arrays
Implementation
Information sharing
Internet
Internet of Things
Libraries
Management of Computing and Information Systems
Networks
Nodes
Operating Systems
Regular Contribution
Reproducibility
Sensors
Threats
United Kingdom > UK
South Korea
Ascon
ASIC implementations
Internet of Things
Lightweight cryptography
ISSN:1615-5262, 1615-5270
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Shrnutí:The Internet of Things (IoT) nodes consist of sensors that collect environmental data and then perform data exchange with surrounding nodes and gateways. Cybersecurity attacks pose a threat to the data security that is being transmitted in any IoT network. Cryptographic primitives are widely adopted to address these threats; however, the substantial computation demands limit their applicability in the IoT ecosystem. In addition, each IoT node varies with respect to the area and throughput (TP) requirements, thus demanding flexible implementation for encryption/decryption processes. To solve these issues, this work implements the NIST lightweight cryptography standard, Ascon, on a SAED 32 nm process design kit (PDK) library by employing loop folded, loop unrolled and fully unrolled architectures. The fully unrolled architecture can achieve the highest TP but at the cost of higher area utilisation. Unrolling by a lower factor results in lower area implementations, enabling the exploration of design space to tackle the trade-off between area and TP performance of the design. The implementation results show that, for loop folded architecture, Ascon-128 and Ascon-128a require 36.7k μ m 2 and 38.5k μ m 2 chip area, respectively compared to 277.1k μ m 2 and 306.6k μ m 2 required by their fully unrolled implementations. The proposed implementation strategies can adjust the number of rounds to accommodate the varied requirements of IoT ecosystems. An implementation with an open-source 45 nm PDK library is also undertaken for enhanced generalization and reproducibility of the results.
Bibliografie:ObjectType-Article-1
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ISSN:1615-5262
1615-5270
DOI:10.1007/s10207-024-00904-1