ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation

High-performance computing (HPC) processors are nowadays integrated cyber-physical systems demanding complex and high-bandwidth closed-loop power and thermal control strategies. To efficiently satisfy real-time multi-input multi-output (MIMO) optimal power requirements, high-end processors integrate...

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Bibliographic Details
Published in:	International journal of parallel programming Vol. 52; no. 1-2; pp. 93 - 123
Main Authors:	Ottaviano, Alessandro, Balas, Robert, Bambini, Giovanni, Del Vecchio, Antonio, Ciani, Maicol, Rossi, Davide, Benini, Luca, Bartolini, Andrea
Format:	Journal Article
Language:	English
Published:	New York Springer US 01.04.2024 Springer Nature B.V
Subjects:	Algorithms Closed loops Clusters Computer Science Control algorithms Control theory Controllers Cyber-physical systems Field programmable gate arrays Hardware-in-the-loop simulation Microprocessors MIMO (control systems) Power control Power management Processor Architectures Reactive power Real time RISC Software Engineering/Programming and Operating Systems Theory of Computation Thermal design RISC-V HPC processor PULP Power and thermal control Scalable Parallel microcontroller
ISSN:	0885-7458, 1573-7640
Online Access:	Get full text
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