Ottaviano, A., Balas, R., Bambini, G., Del Vecchio, A., Ciani, M., Rossi, D., . . . Bartolini, A. (2024). ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation. International journal of parallel programming, 52(1-2), 93-123. https://doi.org/10.1007/s10766-024-00761-4
Citace podle Chicago (17th ed.)Ottaviano, Alessandro, Robert Balas, Giovanni Bambini, Antonio Del Vecchio, Maicol Ciani, Davide Rossi, Luca Benini, a Andrea Bartolini. "ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation." International Journal of Parallel Programming 52, no. 1-2 (2024): 93-123. https://doi.org/10.1007/s10766-024-00761-4.
Citace podle MLA (9th ed.)Ottaviano, Alessandro, et al. "ControlPULP: A RISC-V On-Chip Parallel Power Controller for Many-Core HPC Processors with FPGA-Based Hardware-In-The-Loop Power and Thermal Emulation." International Journal of Parallel Programming, vol. 52, no. 1-2, 2024, pp. 93-123, https://doi.org/10.1007/s10766-024-00761-4.