Efficient VLSI architecture for the parallel dictionary LZW data compression algorithm

The Lempel–Ziv–Welch (LZW) algorithm is an important dictionary-based data compression approach that is used in many communication and storage systems. The parallel dictionary LZW (PDLZW) algorithm speeds up the LZW encoding by using multiple dictionaries. This simplifies the parallel search in the...

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Vydáno v:	IET circuits, devices & systems Ročník 13; číslo 5; s. 576 - 583
Hlavní autoři:	Safieh, Malek, Freudenberger, Jürgen
Médium:	Journal Article
Jazyk:	angličtina
Vydáno:	Stevenage The Institution of Engineering and Technology 01.08.2019 John Wiley & Sons, Inc
Témata:	address space partitioning technique address space sizes Algorithms compression gain compression rate Data compression Data models Dictionaries dictionary-based data compression approach encoding flash memories Flash memory (computers) flash storage systems Lempel–Ziv–Welch algorithm LZW encoding parallel algorithms parallel dictionaries parallel dictionary LZW data compression algorithm parallel search Partitioning PDLZW Random access memory recursive dictionary structure Research Article space partitioning technique storage management Storage systems VLSI VLSI architecture word partitioning technique data compression parallel algorithms compression rate space partitioning technique VLSI Lempel–Ziv–Welch algorithm parallel dictionaries parallel search VLSI architecture encoding LZW encoding address space partitioning technique compression gain storage management PDLZW flash memories address space sizes parallel dictionary LZW data compression algorithm word partitioning technique flash storage systems recursive dictionary structure dictionaries dictionary-based data compression approach
ISSN:	1751-858X, 1751-8598, 1751-8598
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Shrnutí:	The Lempel–Ziv–Welch (LZW) algorithm is an important dictionary-based data compression approach that is used in many communication and storage systems. The parallel dictionary LZW (PDLZW) algorithm speeds up the LZW encoding by using multiple dictionaries. This simplifies the parallel search in the dictionaries. However, the compression gain of the PDLZW depends on the partitioning of the address space, i.e. on the sizes of the parallel dictionaries. This work proposes an address space partitioning technique that optimises the compression rate of the PDLZW. Numerical results for address spaces with 512, 1024, and 2048 entries demonstrate that the proposed address partitioning improves the performance of the PDLZW compared with the original proposal. These address space sizes are suitable for flash storage systems. Moreover, the PDLZW has relative high memory requirements which dominate the costs of a hardware implementation. This work proposes a recursive dictionary structure and a word partitioning technique that significantly reduce the memory size of the parallel dictionaries.
Bibliografie:	ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14
ISSN:	1751-858X 1751-8598 1751-8598
DOI:	10.1049/iet-cds.2018.5017