Fast and Resource-Efficient Hardware Implementation of Modified Line Segment Detector

Lines are significant features enclosing high-level information in an image. The line segment Detector (LSD) Algorithm with low error rate is a widely used method to extract lines in images effectively and accurately. However, the algorithm on PC performs too costly both in time and resources for th...

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Vydané v:	IEEE transactions on circuits and systems for video technology Ročník 28; číslo 11; s. 3262 - 3273
Hlavní autori:	Zhou, Fuqiang, Cao, Yu, Wang, Xinming
Médium:	Journal Article
Jazyk:	English
Vydavateľské údaje:	New York IEEE 01.11.2018 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Predmet:	Algorithms Detectors Edge detection Embedded image processing Error detection Field programmable gate arrays FPGA Gate arrays Hardware Image edge detection Image processing Image segmentation Lane keeping line segment detector Low cost Machine vision Mathematical model Pixels Power consumption Real time Real-time systems Video Vision systems Warning systems
ISSN:	1051-8215, 1558-2205
On-line prístup:	Získať plný text
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