Removal Attacks on Logic Locking and Camouflaging Techniques

With the adoption of a globalized and distributed IC design flow, IP piracy, reverse engineering, and counterfeiting threats are becoming more prevalent. Logic obfuscation techniques including logic locking and IC camouflaging have been developed to address these emergent challenges. A major challen...

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Veröffentlicht in:IEEE transactions on emerging topics in computing Jg. 8; H. 2; S. 517 - 532
Hauptverfasser: Yasin, Muhammad, Mazumdar, Bodhisatwa, Sinanoglu, Ozgur, Rajendran, Jeyavijayan
Format: Journal Article
Sprache:Englisch
Veröffentlicht: New York IEEE 01.04.2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:
Boolean algebra
Boolean functions
boolean satisfiability
Hardware security
IC camouflaging
Integrated circuits
IP networks
Layout
Locking
Logic
logic encryption
Logic gates
logic locking
Reverse engineering
SAT
Security
ISSN:2168-6750, 2168-6750
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Zusammenfassung:With the adoption of a globalized and distributed IC design flow, IP piracy, reverse engineering, and counterfeiting threats are becoming more prevalent. Logic obfuscation techniques including logic locking and IC camouflaging have been developed to address these emergent challenges. A major challenge for logic locking and camouflaging techniques is to resist Boolean satisfiability (SAT) based attacks that can circumvent state-of-the-art solutions within minutes. Over the past year, multiple SAT attack resilient solutions such as Anti-SAT and AND-tree insertion (ATI) have been presented. In this paper, we perform a security analysis of these countermeasures and show that they leave structural traces behind in their attempts to thwart the SAT attack. We present three attacks, namely "signal probability skew" (SPS) attack, "AppSAT guided removal (AGR) attack, and "sensitization guided SAT" (SGS) attack", that can break Anti-SAT and ATI, within minutes.
Bibliographie:ObjectType-Article-1
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ISSN:2168-6750
2168-6750
DOI:10.1109/TETC.2017.2740364