Su, Y., Mu, J., Kim, H., & Kim, B. (2022). A Scalable CMOS Ising Computer Featuring Sparse and Reconfigurable Spin Interconnects for Solving Combinatorial Optimization Problems. IEEE journal of solid-state circuits, 57(3), 858-868. https://doi.org/10.1109/JSSC.2022.3142896
Chicago-Zitierstil (17. Ausg.)Su, Yuqi, Junjie Mu, Hyunjoon Kim, und Bongjin Kim. "A Scalable CMOS Ising Computer Featuring Sparse and Reconfigurable Spin Interconnects for Solving Combinatorial Optimization Problems." IEEE Journal of Solid-state Circuits 57, no. 3 (2022): 858-868. https://doi.org/10.1109/JSSC.2022.3142896.
MLA-Zitierstil (9. Ausg.)Su, Yuqi, et al. "A Scalable CMOS Ising Computer Featuring Sparse and Reconfigurable Spin Interconnects for Solving Combinatorial Optimization Problems." IEEE Journal of Solid-state Circuits, vol. 57, no. 3, 2022, pp. 858-868, https://doi.org/10.1109/JSSC.2022.3142896.