Concatenated LDPC/2-D-Marker Codes and Non-Iterative Detection/Decoding for Recovering Position Errors in Racetrack Memories

Racetrack memories (RMs) are prone to alignment faults called position errors (PEs), which manifest as insertions and deletions of stored data bits. Conventional coding schemes for PEs demonstrate the promising results by employing low-density parity-check (LDPC) codes with an iterative detection an...

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Veröffentlicht in:	IEEE transactions on magnetics Jg. 56; H. 9; S. 1 - 9
Hauptverfasser:	Shibata, Ryo, Hosoya, Gou, Yashima, Hiroyuki
Format:	Journal Article
Sprache:	Englisch
Veröffentlicht:	New York IEEE 01.09.2020 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Schlagworte:	Algorithms Asymptotic properties Binary system Codes Coding Complexity Computer simulation Decoding Detectors Encoding Error correcting codes Iterative decoding Iterative methods Low density parity check codes Low-density parity-check (LDPC) codes Magnetism Markers position error (PE) Position errors racetrack memories (RMs) Reliability synchronization marker Target tracking
ISSN:	0018-9464, 1941-0069
Online-Zugang:	Volltext
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