Real-Time Computation of Local Neighborhood Functions in Application-Specific Instruction-Set Processors

This paper presents a systematic approach to the design of application-specific instruction-set processors for high speed computation of local neighborhood functions and intra-field deinterlacing. The intended application is real-time processing of high definition video. The approach aims at an effi...

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Bibliographic Details
Published in:IEEE transactions on very large scale integration (VLSI) systems Vol. 20; no. 11; pp. 2031 - 2043
Main Authors: Aubertin, P., Langlois, J. M. P., Savaria, Y.
Format: Journal Article
Language:English
Published: New York, NY IEEE 01.11.2012
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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ISSN:1063-8210, 1557-9999
Online Access:Get full text
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Summary:This paper presents a systematic approach to the design of application-specific instruction-set processors for high speed computation of local neighborhood functions and intra-field deinterlacing. The intended application is real-time processing of high definition video. The approach aims at an efficient utilization of the available memory bandwidth by fully exploiting the data parallelism inherent to the target algorithm class. An appropriate choice of custom instructions and application-specific registers is used together with a very long instruction word architecture in order to mimic a pipelined systolic array. This leads to a processing speed close to the limit imposed by memory bandwidth constraints. For three intra-field deinterlacing algorithms and 2-D convolution with four kernel sizes, the design approach yields speedup factors between 36 and 1330, Area-Time (AT) product improvements between 12× and 243×, and energy consumption reduction factors between 13 and 262.
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ISSN:1063-8210
1557-9999
DOI:10.1109/TVLSI.2011.2170204