A development and verification framework for the SegBus platform
We describe the creation of a development framework for a platform-based design approach, in the context of the SegBus platform. The work intends to provide automated procedures for platform build-up and application mapping. The solution is based on a model-based process and heavily employs the UML....
Saved in:
| Published in: | Journal of systems architecture Vol. 59; no. 10; pp. 1015 - 1031 |
|---|---|
| Main Authors: | , , |
| Format: | Journal Article |
| Language: | English |
| Published: |
Amsterdam
Elsevier B.V
01.11.2013
Elsevier Sequoia S.A |
| Subjects: | |
| ISSN: | 1383-7621, 1873-6165, 1873-6165 |
| Online Access: | Get full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Abstract | We describe the creation of a development framework for a platform-based design approach, in the context of the SegBus platform. The work intends to provide automated procedures for platform build-up and application mapping. The solution is based on a model-based process and heavily employs the UML. We develop a Domain Specific Language to support the platform modeling. An emulator is consequently introduced to allow an as much as possible accurate performance estimation of the solution, at high abstraction levels. Automated execution schedule generation is also featured. The resulting framework is applied to build actual design solutions for a MP3-decoder application. |
|---|---|
| AbstractList | We describe the creation of a development framework for a platform-based design approach, in the context of the SegBus platform. The work intends to provide automated procedures for platform build-up and application mapping. The solution is based on a model-based process and heavily employs the UML. We develop a Domain Specific Language to support the platform modeling. An emulator is consequently introduced to allow an as much as possible accurate performance estimation of the solution, at high abstraction levels. Automated execution schedule generation is also featured. The resulting framework is applied to build actual design solutions for a MP3-decoder application. We describe the creation of a development framework for a platform-based design approach, in the context of the SegBus platform. The work intends to provide automated procedures for platform build-up and application mapping. The solution is based on a model-based process and heavily employs the UML. We develop a Domain Specific Language to support the platform modeling. An emulator is consequently introduced to allow an as much as possible accurate performance estimation of the solution, at high abstraction levels. Automated execution schedule generation is also featured. The resulting framework is applied to build actual design solutions for a MP3-decoder application. [PUBLICATION ABSTRACT] We describe the creation of a development framework for a platform-based design approach, in the context of the SegBus platform. The work intends to provide automated procedures for platform build-up and application mapping. The solution is based on a model-based process and heavily employs the UML. We develop a Domain Specific Language to support the platform modeling. An emulator is consequently introduced to allow an as much as possible accurate performance estimation of the solution, at high abstraction levels. Automated execution schedule generation is also featured. The resulting framework is applied to build actual design solutions for a MP3-decoder application. |
| Author | Niazi, Moazzam Fareed Tenhunen, Hannu Seceleanu, Tiberiu |
| Author_xml | – sequence: 1 givenname: Moazzam Fareed surname: Niazi fullname: Niazi, Moazzam Fareed email: moazzam.niazi@utu.fi organization: Turku Centre for Computer Science, Turku, Finland – sequence: 2 givenname: Tiberiu surname: Seceleanu fullname: Seceleanu, Tiberiu email: tiberiu.seceleanu@se.abb.com organization: ABB Corporate Research, Västerås, Sweden – sequence: 3 givenname: Hannu surname: Tenhunen fullname: Tenhunen, Hannu email: hannu.tenhunen@utu.fi organization: Turku Centre for Computer Science, Turku, Finland |
| BackLink | https://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-23510$$DView record from Swedish Publication Index (Mälardalens högskola) |
| BookMark | eNp9kUtP3TAQhS1EJR7tP-giUjddkOCJX8kG9QItrYTURR9by9cZg2-TONjJRfx7jIK66KKrGY2-OToz54QcjmFEQt4DrYCCPN9V6SmZaKuaAquoqigVB-QYGsVKCVIc5p41rFSyhiNyktKOZkJAfUw-bYoO99iHacBxLszYFXuM3nlrZh_GwkUz4GOIfwoXYjHfY_ED7y6XVEy9mfNoeEveONMnfPdaT8mvL59_Xn0tb7_ffLva3JaWCTaXTrKudUi3DltOpeG0BuSmM7Lumq1qGkDhQFHJ3ZZxoBxqtFJK54RUtWrZKTlbddMjTstWT9EPJj7pYLy-9r83OsQ7PXT3umYCaMY_rvgUw8OCadaDTxb73owYlqRBMNqqVgiW0Q__oLuwxDEfo4FLQbMZLjPFV8rGkFJE99cBUP2Sgt7pNQX9koKmSucf57WLdQ3zb_Yeo07W42ix8xHtrLvg_y_wDENEkt4 |
| Cites_doi | 10.1155/2009/867362 10.1023/A:1014070804761 10.1109/SOCC.2010.5784752 10.1109/COMPSACW.2012.58 10.1109/COMPSAC.2006.122 10.1109/SOCCON.2009.5398012 10.15388/Im.2009.0.3239 10.1145/2043662.2043663 10.1016/j.sysarc.2006.07.002 10.1109/SOCC.2008.4641503 10.1109/ECBS.2010.37 10.1109/ICPPW.2010.24 10.1109/TCAD.2004.828127 10.1109/54.970421 10.1145/1289816.1289823 10.1109/PROC.1987.13876 10.1145/1391469.1391615 |
| ContentType | Journal Article |
| Copyright | 2013 Elsevier B.V. Copyright Elsevier Sequoia S.A. Nov 2013 |
| Copyright_xml | – notice: 2013 Elsevier B.V. – notice: Copyright Elsevier Sequoia S.A. Nov 2013 |
| DBID | AAYXX CITATION 7SC 8FD JQ2 L7M L~C L~D ADTPV AOWAS DF7 |
| DOI | 10.1016/j.sysarc.2013.07.005 |
| DatabaseName | CrossRef Computer and Information Systems Abstracts Technology Research Database ProQuest Computer Science Collection Advanced Technologies Database with Aerospace Computer and Information Systems Abstracts Academic Computer and Information Systems Abstracts Professional SwePub SwePub Articles SWEPUB Mälardalens högskola |
| DatabaseTitle | CrossRef Computer and Information Systems Abstracts Technology Research Database Computer and Information Systems Abstracts – Academic Advanced Technologies Database with Aerospace ProQuest Computer Science Collection Computer and Information Systems Abstracts Professional |
| DatabaseTitleList | Computer and Information Systems Abstracts Computer and Information Systems Abstracts |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Computer Science |
| EISSN | 1873-6165 |
| EndPage | 1031 |
| ExternalDocumentID | oai_DiVA_org_mdh_23510 3146459791 10_1016_j_sysarc_2013_07_005 S138376211300129X |
| Genre | Feature |
| GroupedDBID | --K --M -~X .DC .~1 0R~ 1B1 1~. 1~5 29L 4.4 457 4G. 5GY 5VS 7-5 71M 8P~ AACTN AAEDT AAEDW AAIAV AAIKJ AAKOC AALRI AAOAW AAQFI AAQXK AAXUO AAYFN ABBOA ABFNM ABFRF ABJNI ABMAC ABXDB ABYKQ ACDAQ ACGFO ACGFS ACNNM ACRLP ACZNC ADBBV ADEZE ADJOM ADMUD ADTZH AEBSH AECPX AEFWE AEKER AENEX AFKWA AFTJW AGHFR AGUBO AGYEJ AHJVU AHZHX AIALX AIEXJ AIKHN AITUG AJBFU AJOXV ALMA_UNASSIGNED_HOLDINGS AMFUW AMRAJ AOUOD ASPBG AVWKF AXJTR AZFZN BJAXD BKOJK BKOMP BLXMC CS3 DU5 EBS EFJIC EFLBG EJD EO8 EO9 EP2 EP3 FDB FEDTE FGOYB FIRID FNPLU FYGXN G-Q GBLVA GBOLZ HVGLF HZ~ IHE J1W JJJVA KOM M41 MO0 MS~ N9A O-L O9- OAUVE OZT P-8 P-9 P2P PC. PQQKQ Q38 R2- RIG ROL RPZ RXW SBC SDF SDG SDP SES SEW SPC SPCBC SST SSV SSZ T5K TAE TN5 U5U UHS ~G- 9DU AATTM AAXKI AAYWO AAYXX ABWVN ACLOT ACRPL ACVFH ADCNI ADNMO AEIPS AEUPX AFJKZ AFPUW AGQPQ AIGII AIIUN AKBMS AKRWK AKYEP ANKPU APXCP CITATION EFKBS ~HD 7SC 8FD AFXIZ AGCQF AGRNS JQ2 L7M L~C L~D SSH ADTPV AOWAS DF7 |
| ID | FETCH-LOGICAL-c353t-f63d9fe0bfe9406a4021e4ada62d8b7881e5f17064fb3410412ec666ff5672793 |
| ISICitedReferencesCount | 0 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000330090400002&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| ISSN | 1383-7621 1873-6165 |
| IngestDate | Thu Oct 30 11:23:28 EDT 2025 Sat Sep 27 20:07:29 EDT 2025 Fri Jul 25 03:02:11 EDT 2025 Sat Nov 29 01:35:53 EST 2025 Fri Feb 23 02:28:00 EST 2024 |
| IsPeerReviewed | true |
| IsScholarly | true |
| Issue | 10 |
| Keywords | Code generation System emulation Domain-specific languages System-on-chip Model-based engineering |
| Language | English |
| LinkModel | OpenURL |
| MergedId | FETCHMERGED-LOGICAL-c353t-f63d9fe0bfe9406a4021e4ada62d8b7881e5f17064fb3410412ec666ff5672793 |
| Notes | SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 14 ObjectType-Article-2 content type line 23 |
| PQID | 1465010446 |
| PQPubID | 9850 |
| PageCount | 17 |
| ParticipantIDs | swepub_primary_oai_DiVA_org_mdh_23510 proquest_miscellaneous_1530979553 proquest_journals_1465010446 crossref_primary_10_1016_j_sysarc_2013_07_005 elsevier_sciencedirect_doi_10_1016_j_sysarc_2013_07_005 |
| PublicationCentury | 2000 |
| PublicationDate | 2013-11-01 |
| PublicationDateYYYYMMDD | 2013-11-01 |
| PublicationDate_xml | – month: 11 year: 2013 text: 2013-11-01 day: 01 |
| PublicationDecade | 2010 |
| PublicationPlace | Amsterdam |
| PublicationPlace_xml | – name: Amsterdam |
| PublicationTitle | Journal of systems architecture |
| PublicationYear | 2013 |
| Publisher | Elsevier B.V Elsevier Sequoia S.A |
| Publisher_xml | – name: Elsevier B.V – name: Elsevier Sequoia S.A |
| References | T. Lindroth, R. Lavinia, T. Seceleanu, N. Avessta, J. Teuhola, Building a UML profile for on-chip distributed platforms, in: The 30th Intl. Computer Software and Applications Conference (COMPSAC), 2006. pp. 372–373. OMG. OCL 2.0 Revised Submission, version 1.6. January 2003. G. Schelle, D. Grunwald, Onchip interconnect exploration for multicore processors utilizing FPGAs, in: 2nd Workshop on Architecture Research using FPGA Platforms, 2006. Architecture Analysis & Design Language. International Technology Roadmap for Semiconductors, 2007 Edition. Jantsch, Tenhunen (b0010) 2003 M.F. Niazi, T. Seceleanu, H. Tenhunen, An automated control code generation approach for the SegBus platform, in: The 23rd IEEE Intl. System-on-Chip Conference (SOCC), 2010. pp. 199–204. T. Seceleanu, V. Leppänen, O. Nevalainen, Improving the performance of bus platforms by means of segmentation and optimized resource allocation, The EURASIP Journal on Embedded Systems, vol. 2009 (2009), article ID 867362, doi:10.1155/2009/867362. Unified Modeling Language (UML) Superstructure Specification, version 2.0. M.F. Niazi, K. Latif, T. Seceleanu, H. Tenhunen, A DSL for the SegBus platform, in: The 22nd IEEE Intl. System-on-Chip Conf., 2009. pp. 393–398. M. Thompson et al., A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs, in: Proceedings of 5th IEEE/ACM/IFIP Intl. Conference on Hardware/Software Codesign and System, Synthesis (CODES+ISSS), 2007. pp. 9–14. Eclipse Modeling – Model-to-Text Transformation. K. Latif, M. Niazi, T. Seceleanu, H. Tenhunen, S. Sezer, Application development flow for on-chip distributed architectures, in: Proceedings of the 21st Intl. System-on-Chip Conference (SOCC), 2008. pp. 163–168. M.F. Niazi, T. Seceleanu, H. Tenhunen, A performance estimation technique for the SegBus distributed architecture, in: The 39th Intl. Conference on Parallel Processing Workshops (ICPPW), 2010. pp. 89–98. The UML Profile for MARTE: Modeling and analysis of real-time and embedded Systems. R. Thomson, S. Moyers, D. Mulvaney, V. Chouliaras, The UML-based design of a hardware H.264/MPEG-4 AVC Video Decompression Core, in: the 5th Intl. UML for SOC Design, Workshop, June 2008. Garlan, Shaw (b0080) 1993; vol. 1 Seceleanu (b0020) April 2007; 53 H. Nikolov et al., Daedalus: Toward composable multimedia MP-SoC design, in: Proceedings of 45th ACM/IEEE Design Automation Conference (DAC), 2008. pp. 574–579. . Gérard (b0125) 2007; 4 M. Vidmantas, E. Kazanavičius, Conception of a multi-platform system software and firmware development tool, in: Periodical of Information Sciences, Issue 50, Vilnius University Publishing House, 2009. pp. 194–199. M.F. Niazi, T. Seceleanu, H. Tenhunen, Towards reuse-based development for the on-chip distributed SoC architecture, in: The 36th IEEE Comp. Software and Applications Conf. Workshops, 2012. pp. 278–283. Java Programming Language. Model-Driven Architecture. Lee, Messerschmitt (b0075) 1987; 75 Park, Jang, Ha (b0105) 2002; 6 Sandiovanni-Vincentelli, Martin (b0030) 2001; 18 A. Ferrari, A. Sangiovanni-Vincentelli, System design: traditional concepts and new paradigms, in: The IEEE Intl. Conference on Computer Design: VLSI in Computer and Processors, 1999. pp. 2–12. M.F. Niazi, T. Seceleanu, H. Tenhunen, An emulation solution for the SegBus platform, in: The 17th IEEE Intl. Conference and Workshops on Engineering of Computer-Based Systems (ECBS), 2010. pp. 268–275. Lahiri, Raghunathan, Dey (b0015) 2004; 23 MagicDraw UML. E. Riccobene, A. Rosti, P. Scandurra, Improving SoC Design Flow by means of MDA and UML Profiles, in: 3rd Workshop in Software Model Engineering (WiSME), 2004. A. Gamatié et al. A model-driven design framework for massively parallel embedded systems. ACM Transactions on Embedded Computing Systems (TECS), vol. 10, nr. 4, article no. 39, November 2011. 10.1016/j.sysarc.2013.07.005_b0145 10.1016/j.sysarc.2013.07.005_b0025 10.1016/j.sysarc.2013.07.005_b0005 10.1016/j.sysarc.2013.07.005_b0065 10.1016/j.sysarc.2013.07.005_b0120 10.1016/j.sysarc.2013.07.005_b0165 10.1016/j.sysarc.2013.07.005_b0045 10.1016/j.sysarc.2013.07.005_b0100 10.1016/j.sysarc.2013.07.005_b0060 Gérard (10.1016/j.sysarc.2013.07.005_b0125) 2007; 4 10.1016/j.sysarc.2013.07.005_b0160 10.1016/j.sysarc.2013.07.005_b0040 10.1016/j.sysarc.2013.07.005_b0085 10.1016/j.sysarc.2013.07.005_b0140 Park (10.1016/j.sysarc.2013.07.005_b0105) 2002; 6 Sandiovanni-Vincentelli (10.1016/j.sysarc.2013.07.005_b0030) 2001; 18 10.1016/j.sysarc.2013.07.005_b0035 10.1016/j.sysarc.2013.07.005_b0135 Jantsch (10.1016/j.sysarc.2013.07.005_b0010) 2003 Seceleanu (10.1016/j.sysarc.2013.07.005_b0020) 2007; 53 10.1016/j.sysarc.2013.07.005_b0115 10.1016/j.sysarc.2013.07.005_b0130 10.1016/j.sysarc.2013.07.005_b0055 10.1016/j.sysarc.2013.07.005_b0110 10.1016/j.sysarc.2013.07.005_b0155 Lahiri (10.1016/j.sysarc.2013.07.005_b0015) 2004; 23 10.1016/j.sysarc.2013.07.005_b0050 10.1016/j.sysarc.2013.07.005_b0095 10.1016/j.sysarc.2013.07.005_b0150 10.1016/j.sysarc.2013.07.005_b0090 Lee (10.1016/j.sysarc.2013.07.005_b0075) 1987; 75 10.1016/j.sysarc.2013.07.005_b0070 Garlan (10.1016/j.sysarc.2013.07.005_b0080) 1993; vol. 1 |
| References_xml | – reference: E. Riccobene, A. Rosti, P. Scandurra, Improving SoC Design Flow by means of MDA and UML Profiles, in: 3rd Workshop in Software Model Engineering (WiSME), 2004. – reference: M. Vidmantas, E. Kazanavičius, Conception of a multi-platform system software and firmware development tool, in: Periodical of Information Sciences, Issue 50, Vilnius University Publishing House, 2009. pp. 194–199. – reference: T. Lindroth, R. Lavinia, T. Seceleanu, N. Avessta, J. Teuhola, Building a UML profile for on-chip distributed platforms, in: The 30th Intl. Computer Software and Applications Conference (COMPSAC), 2006. pp. 372–373. – reference: M. Thompson et al., A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs, in: Proceedings of 5th IEEE/ACM/IFIP Intl. Conference on Hardware/Software Codesign and System, Synthesis (CODES+ISSS), 2007. pp. 9–14. – reference: M.F. Niazi, T. Seceleanu, H. Tenhunen, Towards reuse-based development for the on-chip distributed SoC architecture, in: The 36th IEEE Comp. Software and Applications Conf. Workshops, 2012. pp. 278–283. – volume: 75 start-page: 1235 year: 1987 end-page: 1245 ident: b0075 article-title: Synchronous dataflow publication-title: Proceedings of the IEEE – reference: K. Latif, M. Niazi, T. Seceleanu, H. Tenhunen, S. Sezer, Application development flow for on-chip distributed architectures, in: Proceedings of the 21st Intl. System-on-Chip Conference (SOCC), 2008. pp. 163–168. – volume: 23 start-page: 952 year: 2004 end-page: 961 ident: b0015 article-title: Design space exploration for optimizing on-chip communication architectures publication-title: IEEE Tran. on Comp. aided Design of Integrated Circuits and Systems – volume: 18 start-page: 23 year: 2001 end-page: 33 ident: b0030 article-title: Platform-based design and software design methodology for embedded systems publication-title: IEEE Design and Test of Computers – volume: vol. 1 year: 1993 ident: b0080 article-title: An introduction to software architecture publication-title: Advances in Software Engineering and Knowledge Engineering – reference: Model-Driven Architecture. – reference: MagicDraw UML. – volume: 4 start-page: 1 year: 2007 end-page: 17 ident: b0125 article-title: UML&AADL ’2007 Grand Challenges publication-title: ACM Specl Interest Group on Embedded Systems – reference: A. Ferrari, A. Sangiovanni-Vincentelli, System design: traditional concepts and new paradigms, in: The IEEE Intl. Conference on Computer Design: VLSI in Computer and Processors, 1999. pp. 2–12. – reference: International Technology Roadmap for Semiconductors, 2007 Edition. – reference: R. Thomson, S. Moyers, D. Mulvaney, V. Chouliaras, The UML-based design of a hardware H.264/MPEG-4 AVC Video Decompression Core, in: the 5th Intl. UML for SOC Design, Workshop, June 2008. – reference: M.F. Niazi, T. Seceleanu, H. Tenhunen, An automated control code generation approach for the SegBus platform, in: The 23rd IEEE Intl. System-on-Chip Conference (SOCC), 2010. pp. 199–204. – volume: 6 start-page: 295 year: 2002 end-page: 322 ident: b0105 article-title: Extended synchronous dataflow for efficient DSP system prototyping publication-title: Journal of Design Automation for Embedded Systems, Springer Netherlands – reference: M.F. Niazi, K. Latif, T. Seceleanu, H. Tenhunen, A DSL for the SegBus platform, in: The 22nd IEEE Intl. System-on-Chip Conf., 2009. pp. 393–398. – reference: OMG. OCL 2.0 Revised Submission, version 1.6. January 2003. – reference: H. Nikolov et al., Daedalus: Toward composable multimedia MP-SoC design, in: Proceedings of 45th ACM/IEEE Design Automation Conference (DAC), 2008. pp. 574–579. – reference: M.F. Niazi, T. Seceleanu, H. Tenhunen, An emulation solution for the SegBus platform, in: The 17th IEEE Intl. Conference and Workshops on Engineering of Computer-Based Systems (ECBS), 2010. pp. 268–275. – reference: Eclipse Modeling – Model-to-Text Transformation. – reference: . – reference: Unified Modeling Language (UML) Superstructure Specification, version 2.0. – reference: M.F. Niazi, T. Seceleanu, H. Tenhunen, A performance estimation technique for the SegBus distributed architecture, in: The 39th Intl. Conference on Parallel Processing Workshops (ICPPW), 2010. pp. 89–98. – reference: Java Programming Language. – reference: A. Gamatié et al. A model-driven design framework for massively parallel embedded systems. ACM Transactions on Embedded Computing Systems (TECS), vol. 10, nr. 4, article no. 39, November 2011. – reference: T. Seceleanu, V. Leppänen, O. Nevalainen, Improving the performance of bus platforms by means of segmentation and optimized resource allocation, The EURASIP Journal on Embedded Systems, vol. 2009 (2009), article ID 867362, doi:10.1155/2009/867362. – reference: G. Schelle, D. Grunwald, Onchip interconnect exploration for multicore processors utilizing FPGAs, in: 2nd Workshop on Architecture Research using FPGA Platforms, 2006. – reference: Architecture Analysis & Design Language. – year: 2003 ident: b0010 article-title: Networks on Chip – reference: The UML Profile for MARTE: Modeling and analysis of real-time and embedded Systems. – volume: 53 start-page: 151 year: April 2007 end-page: 169 ident: b0020 article-title: The SegBus Platform – Architecture and Communication Mechanisms publication-title: Journal of Systems Architecture – ident: 10.1016/j.sysarc.2013.07.005_b0140 – ident: 10.1016/j.sysarc.2013.07.005_b0070 doi: 10.1155/2009/867362 – volume: 4 start-page: 1 issue: 4 year: 2007 ident: 10.1016/j.sysarc.2013.07.005_b0125 article-title: UML&AADL ’2007 Grand Challenges publication-title: ACM Specl Interest Group on Embedded Systems – volume: 6 start-page: 295 issue: 3 year: 2002 ident: 10.1016/j.sysarc.2013.07.005_b0105 article-title: Extended synchronous dataflow for efficient DSP system prototyping publication-title: Journal of Design Automation for Embedded Systems, Springer Netherlands doi: 10.1023/A:1014070804761 – ident: 10.1016/j.sysarc.2013.07.005_b0055 doi: 10.1109/SOCC.2010.5784752 – ident: 10.1016/j.sysarc.2013.07.005_b0060 doi: 10.1109/COMPSACW.2012.58 – ident: 10.1016/j.sysarc.2013.07.005_b0085 doi: 10.1109/COMPSAC.2006.122 – ident: 10.1016/j.sysarc.2013.07.005_b0035 – ident: 10.1016/j.sysarc.2013.07.005_b0040 doi: 10.1109/SOCCON.2009.5398012 – ident: 10.1016/j.sysarc.2013.07.005_b0150 doi: 10.15388/Im.2009.0.3239 – ident: 10.1016/j.sysarc.2013.07.005_b0130 – ident: 10.1016/j.sysarc.2013.07.005_b0115 doi: 10.1145/2043662.2043663 – volume: 53 start-page: 151 issue: 4 year: 2007 ident: 10.1016/j.sysarc.2013.07.005_b0020 article-title: The SegBus Platform – Architecture and Communication Mechanisms publication-title: Journal of Systems Architecture doi: 10.1016/j.sysarc.2006.07.002 – ident: 10.1016/j.sysarc.2013.07.005_b0025 – ident: 10.1016/j.sysarc.2013.07.005_b0165 doi: 10.1109/SOCC.2008.4641503 – ident: 10.1016/j.sysarc.2013.07.005_b0065 – ident: 10.1016/j.sysarc.2013.07.005_b0005 – ident: 10.1016/j.sysarc.2013.07.005_b0045 doi: 10.1109/ECBS.2010.37 – ident: 10.1016/j.sysarc.2013.07.005_b0135 – ident: 10.1016/j.sysarc.2013.07.005_b0110 – ident: 10.1016/j.sysarc.2013.07.005_b0120 – ident: 10.1016/j.sysarc.2013.07.005_b0145 – ident: 10.1016/j.sysarc.2013.07.005_b0090 – year: 2003 ident: 10.1016/j.sysarc.2013.07.005_b0010 – ident: 10.1016/j.sysarc.2013.07.005_b0050 doi: 10.1109/ICPPW.2010.24 – volume: 23 start-page: 952 issue: 6 year: 2004 ident: 10.1016/j.sysarc.2013.07.005_b0015 article-title: Design space exploration for optimizing on-chip communication architectures publication-title: IEEE Tran. on Comp. aided Design of Integrated Circuits and Systems doi: 10.1109/TCAD.2004.828127 – ident: 10.1016/j.sysarc.2013.07.005_b0095 – ident: 10.1016/j.sysarc.2013.07.005_b0100 – volume: 18 start-page: 23 issue: 6 year: 2001 ident: 10.1016/j.sysarc.2013.07.005_b0030 article-title: Platform-based design and software design methodology for embedded systems publication-title: IEEE Design and Test of Computers doi: 10.1109/54.970421 – volume: vol. 1 year: 1993 ident: 10.1016/j.sysarc.2013.07.005_b0080 article-title: An introduction to software architecture – ident: 10.1016/j.sysarc.2013.07.005_b0155 doi: 10.1145/1289816.1289823 – volume: 75 start-page: 1235 issue: 9 year: 1987 ident: 10.1016/j.sysarc.2013.07.005_b0075 article-title: Synchronous dataflow publication-title: Proceedings of the IEEE doi: 10.1109/PROC.1987.13876 – ident: 10.1016/j.sysarc.2013.07.005_b0160 doi: 10.1145/1391469.1391615 |
| SSID | ssj0005512 |
| Score | 1.9430623 |
| Snippet | We describe the creation of a development framework for a platform-based design approach, in the context of the SegBus platform. The work intends to provide... |
| SourceID | swepub proquest crossref elsevier |
| SourceType | Open Access Repository Aggregation Database Index Database Publisher |
| StartPage | 1015 |
| SubjectTerms | Accumulation Architecture (computers) Automated Automation Code generation Construction Design engineering Domain-specific languages Mapping Mathematical models Model-based engineering Platforms Programming languages Schedules Software engineering Studies System emulation System-on-chip Systems design |
| Title | A development and verification framework for the SegBus platform |
| URI | https://dx.doi.org/10.1016/j.sysarc.2013.07.005 https://www.proquest.com/docview/1465010446 https://www.proquest.com/docview/1530979553 https://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-23510 |
| Volume | 59 |
| WOSCitedRecordID | wos000330090400002&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| journalDatabaseRights | – providerCode: PRVESC databaseName: Elsevier SD Freedom Collection Journals 2021 customDbUrl: eissn: 1873-6165 dateEnd: 99991231 omitProxy: false ssIdentifier: ssj0005512 issn: 1873-6165 databaseCode: AIEXJ dateStart: 19960101 isFulltext: true titleUrlDefault: https://www.sciencedirect.com providerName: Elsevier |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwtV1Lb9QwELZQy4ELb8RCqYwEp1VWYW0n8Y1AW7UIqkoUtDfLTuw-JLzVZoMqfj3j2E6C2opy4BKtsk5ie75MvhmPZxB6Y4wEGqxUoqjuvFV1UsyNTggtqASLoqpUl13_c354WCwW_CgU42y6cgK5tcXlJb_4r6KGcyBst3X2H8Td3xROwG8QOhxB7HC8leDLuBGqDx-HIbiAoBBWGKOx-gDDr_rkQ9u4etJrx2BvoKs-5XMzHa88DIsa8lcXFfBlNt2b9U4bXcE3TdrWY0JBL9reUaDtaWu9ytufjV0P70jYgzdoyyInYHv6Yg9RnYYE3wE26fQIiHnw-HodCUqAXau8vR_hfAYDgrG4sDvSJVZN2fCx-iMt9s7Z91IsVyfiR30q5oS5rXab85xxUG-b5cHu4tMQ7cP8wjcY5Ano_84Oj72POyq7sL-rD7-JsYwtknGW2Y6ZHD9E94OMcOmh8Ajd0fYxehDLdeCgvZ-g9yUeIQMDMvAYGbhHBgYYYEAG9sjAERlP0be93eOP-0kooJFUhJF1YjJSc6NTZTQH4iYpEDpNZS2zeV0oV0hAM-PyJ1GjgM241Gu6AnvWGOYW6Dl5hjbs0urnCHNJeUo10xXNaKa14ikramhIJa84zSYoiZMkLnyeFBEDCM-Fn1ThJlWkLuCBTVAeZ1IEruc5nAA0_OXKrTjxIrx2jTNgmfMsuI687v8GTemWv6TVyxbaMJLynDNGJuitF1jf1evR9OKW7V6ie8PrsYU21qtWv0J3q5_rs2a1HaD4G_PdmMs |
| linkProvider | Elsevier |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Ajournal&rft.genre=article&rft.atitle=A+development+and+verification+framework+for+the+SegBus+platform&rft.jtitle=Journal+of+systems+architecture&rft.au=Niazi%2C+M.+F.&rft.au=Seceleanu%2C+Tiberiu&rft.au=Tenhunen%2C+H.&rft.date=2013-11-01&rft.issn=1873-6165&rft.volume=59&rft.issue=10+PART+C&rft.spage=1015&rft_id=info:doi/10.1016%2Fj.sysarc.2013.07.005&rft.externalDocID=oai_DiVA_org_mdh_23510 |
| thumbnail_l | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1383-7621&client=summon |
| thumbnail_m | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1383-7621&client=summon |
| thumbnail_s | http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1383-7621&client=summon |