Rapid Prototyping for Design and Test of FPGA-Based Model Predictive Controllers for Power Converters

Recent advancements in FPGA technology have made these devices a cost-effective alternative for implementing Model Predictive Controllers (MPCs). This paper addresses the fast prototyping of FPGA-based Finite Control Set (FCS)-MPCs and the essential verification process preceding hardware-level test...

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Bibliographic Details
Published in:Journal of electrical engineering & technology Vol. 20; no. 4; pp. 2419 - 2438
Main Authors: Purraji, Marziye, Zamiri, Elyas, Sanchez, Alberto, de Castro, Angel
Format: Journal Article
Language:English
Published: Singapore Springer Nature Singapore 01.05.2025
Springer Nature B.V
대한전기학회
Subjects:
Electrical Engineering
Electrical Machines and Networks
Electronics and Microelectronics
Engineering
Instrumentation
Original Article
Power Electronics
전기공학
Model predictive control
MATLAB HDL coder
Power electronics
Finite control set
FPGA
ISSN:1975-0102, 2093-7423
Online Access:Get full text
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Summary:Recent advancements in FPGA technology have made these devices a cost-effective alternative for implementing Model Predictive Controllers (MPCs). This paper addresses the fast prototyping of FPGA-based Finite Control Set (FCS)-MPCs and the essential verification process preceding hardware-level testing. The methodology leverages MATLAB HDL Coder for automated HDL code generation. This approach offers a streamlined process and eliminates the need for expertise in hand-coded HDL, making it an ideal solution for power electronics engineers. The approach is exemplified using a three-phase active neutral point clamped converter. Beyond presenting the design approach, the paper introduces a systematic multi-stage verification process essential for the rapid prototyping of FCS-MPC controllers. This verification involves step-by-step simulations followed by experimental hardware-in-the-loop tests, ensuring the reliability of each stage for the smooth transition from pure simulation to FPGA hardware implementation of the controller. The proposed methodology not only simplifies the implementation and testing of the MPC algorithm within an FPGA but also facilitates the debugging process, a crucial aspect of the design phase.
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ISSN:1975-0102
2093-7423
DOI:10.1007/s42835-025-02173-x